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What is the relationship between setting time and RC constant?

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surianova

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hi !

I have a capacitor value of 0.1 uF and resistor value of 3k, and the signal
take 40 us to settle, is it normal for such value?

what is the relationship between setting time and RC constant ?

suria
 

settling time formula

You should allow > 5 * RC time to rich ≈100% stabilization ..

1RC ≈ 62%
2RC ≈ 86%
3RC ≈ 95%
4RC ≈ 98%
5RC ≈ 99%
5RC + ≈100%
 

settling time calculation

IanP said:
You should allow > 5 * RC time to rich ≈100% stabilization ..

1RC ≈ 62%
2RC ≈ 86%
3RC ≈ 95%
4RC ≈ 98%
5RC ≈ 99%
5RC + ≈100%
Click to expand...


Tx.

One more things is, may i know how you come out with that percentage with the RC? For my simulation, the 1RC = 300 us. But what i see, 40 us already settle and quite stable or equivalent to 40/300 = 13 % stabilization. It is make sense?

tx for your advice...
 

settling time first order system

2 surianova:

calculate 1-exp(-t/RC) for t=RC..5RC and you'll get the numbers IanP has written.
 

time constant settling time

IanP said:
No, it does't make sense ...
Values (%) were taken from RC - time constant graph:
h**p://www.interfacebus.com/Design_RC_Rising_Time_Constant_Graph.html
Click to expand...


from homepage, what is the meaning by fraction of max error? Is it refer to amplitude of the signal?
 

settling time and time constant

HI,

settling time -is he time taken to reach a value(+ or -2 % of final value in general)
so here it is the time taken to reach 98% which is nothing but 4RC .
 

1% settling time equation

Dear surianova,

Like the earlier posts, you should be clear about the value till which the signal settles. Normal standards would be anywhere between 1 - 5% of the input value. One crucial thing you should note is that, since it is a first order circuit, the circuit has not other option but to settle. You will never notice any oscillations.
 

calculate settling time

Vamsi Mocherla said:
Dear surianova,

Like the earlier posts, you should be clear about the value till which the signal settles. Normal standards would be anywhere between 1 - 5% of the input value. One crucial thing you should note is that, since it is a first order circuit, the circuit has not other option but to settle. You will never notice any oscillations.
Click to expand...

ya. I understand about that. My expexted value is ard 1.2v when settle. It take only 40 us to reach this value. The signal will start with big osilation at the starting point and reduce to almost flat at 1.2v in 40 us. But my RC is 400 us. That mean less than 1RC, the signal almost 100 % settle. It is not acording to the formula
given. Am i right?

one more thing is, the signal that i take is from a close-loop feedback system.
 

equation for settling time

If you can post the schematics, may be we can look into it. It is not possible to settle so fast with a first order situation. May be the higher order blocks is causing the output to rise faster. Is there an active block in the closed loop system, which is forcing the output to rise faster than a passive circuit?
 

settling time of first order

Vamsi Mocherla said:
If you can post the schematics, may be we can look into it. It is not possible to settle so fast with a first order situation. May be the higher order blocks is causing the output to rise faster. Is there an active block in the closed loop system, which is forcing the output to rise faster than a passive circuit?
Click to expand...

i think the formula given, is for the a capacitor to charge or discharge up to certain value. But my question is about the settilng time. The signal will have some ringing, after that settle down, is it both the same? If yes, any formula to link it?
 

settling time formula

The concept of settling comes only when higher order transfer functions are there. In case you have used an OPamp, you get the settling considering the GBW of the opamp,which changes in frequency. Like I have said earlier, you cannot get ringing with First order. I usually calculate things manually transforming the s-domain equations to time domain.
 

first order system settling time

hi all,

i do believe the 5RC is for RC constant time that is used to determine the capacitor charging and discharging time.

for the settling time, it depends on the phase margin and dampling ratio of ur closed loop system. ideally 0.7 dampling ration and 60' phase margin will form a undamp output in trans response.


hope it helps, and do correct me if i'm wrong.


regards,
smart
 

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