DAC: linearity residuals

Hi,

I am trying to understand what is and how can be calculated the fit residuals of an 10-bit DAC (from an custom ASIC). So, assuming we have the plots from the attached figure, which shows us the DACs linearity and also the fit residuals.
My guess is that this fit residuals are like quantisation errors, and can be estimated as the difference between the measured analog output at some registers value and the desired analog output (ideal value).

Please let me know if my way is ok on this.





PS: The image is from this source: https://iopscience.iop.org/article/10.1088/1748-0221/8/01/C01006/pdf



Thanks,
Vlad

The DACs has two kind of non-linearity. The integral (INL) which is a dispersion of measured value from an "ideal" one. This "ideal" transfer curve (Vout vs DAC code) is the straight line connecting the first and the last points of measured values (so called "end-point" method), while INL values are calculated as
\[INL_k=\frac{V_{meas}(k)-V_{ideal}(k)}{LSB}\]
where:
k - DAC code (natural number in a range of 0 to 2^N-1, N is a resolution
V_meas(k) is a measured output voltage (or current) for k-th code
V_ideal(k) is an ideal value for k-th code. This function is defined as \[V_{ideal}(k) = \frac{V_{meas}(2^N-1)-V_{meas}(0)}{2^N-1} k+V_{meas}(0)\]
LSB is a step value (slope of ideal line)

The "best fit" method is not recommended because lowering the non-linearity values.

The second kind of non-linearity is a dispersion of actual step value from a LSB and is defined as:
\[DNL_k = \frac{V_{meas}(k+1) - V_{meas}(k)}{LSB}-1\]
This parameter inform about monotonicity of converter.