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[SOLVED] DFT - How to add derived clock in a design

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Ali_louati

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Hello guys,

I am thankfull to be part of this forum.

I'm working with a design including just one clock ( benchmark ITC 99 design).

My objectif is to reproduce one of the straggered clock scheme (attached) that I found in this paper (Using Launch-on-Capture for Testing Scan Designs Containing Synchronous and Asynchronous Clock Domains).

My problem that I tried to read the Tessent manual, and I didn't found how to add derived clocks from the refernce clock.

Did any one did something similar to that. Are we able to do those kind of scheme with a design containing just one clock?

I'm using Dft advisor and Fastscan

timing diagram.PNG
 

Hello guys,

I am thankfull to be part of this forum.

I'm working with a design including just one clock ( benchmark ITC 99 design).

My objectif is to reproduce one of the straggered clock scheme (attached) that I found in this paper (Using Launch-on-Capture for Testing Scan Designs Containing Synchronous and Asynchronous Clock Domains).

My problem that I tried to read the Tessent manual, and I didn't found how to add derived clocks from the refernce clock.

Did any one did something similar to that. Are we able to do those kind of scheme with a design containing just one clock?

I'm using Dft advisor and Fastscan

View attachment 135868

you would have to have these clocks in your design already. check with your synthesis tool about how to add clocks that are divided versions of other clocks.
 

Hello ThisIsNotSam,

Thank you for your answer. I would like to know if I have to add those clock by my self to the design, or if the synthesis tools could add them automatically.

Thank you
 

Hello ThisIsNotSam,

Thank you for your answer. I would like to know if I have to add those clock by my self to the design, or if the synthesis tools could add them automatically.

Thank you

no clocks are automatically added for you.
 
It sounds like you would have to create those clocks in the design yourself, most probably by dividing down the original clock twice in a cascaded fashion, to generated CK2 and CK3.
 
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