How to auto-negotiate k7 fpga with gt wizard module to network card

Hello all,

I using the kintex 7 gt wizard setup with 8/10b ethernet so I can see the destination & source mac address.

The fpga works with a loop back etc.

The problem I have is when i connect it to a network card. The external network card does not recognize it.

I guess this is due to a layer 2 auto negotiation problem.

Is it possible to do a build with the pcs and pma ethernet module which allows me to filter based on source and destination mac? In addition will i get a strobe if it fails these values?

otherwise I'm forced to have to use the gt wizard and monitor the rxischar/rxiscomma signals until I get the correct sequence.

Now first things first.

How do I get an external network card to acknowledge there is a carrier?
Do I state machine a auto negotiation sequence or do I configure the network card?

REgards,
Wesley

Look at the ethernet demo designs with an ethernet mac using SGMII. (if the PHY has fifo options, you might consider 1000BaseX.)

There are a few issues -- the first is the rx/tx rate mismatch. The issue is that the RX clock is recovered and the TX clock is generated. In some of the loopback modes, the tx data is directly connected to the rx data without being clocked into the FPGA first. This causes the system to work fine.

For FPGAs, there are a few main solutions to this. The first is a packet fifo. In this case, some extra logic is added to detect packet start/end/error. data is placed into a fifo and then sent out only when a full packet is in the fifo. If you want to reduce latency, you can perform a rate-mismatch calculation and change this into "data is sent when a packet is done or has more than X bytes". The other solution is to match the TX rate to the RX rate by using the PI-XCO mode of the FPGA (uses a feature of the CPLL along with a FSM to match rates). This gives the lowest latency, but you might need to get the pixco logic from something else. There is an SDI demo that has one, but I have no idea if it is encrypted.


The second part is autonegotiation. SGMII has symbol duplication (mostly), which allows you to detect different rates. You can also poll the PHY using the MIIM (MDIO) interface.

All of these things have example designs from xilinx. You can start with the demo or at least pick the logic modules you need before rewriting anything.

The problem I have is when i connect it to a network card. The external network card does not recognize it.

Click to expand...

I would first check if the PHY is being configured properly or not.

Do I state machine a auto negotiation sequence or do I configure the network card?

Click to expand...

There should be a state-machine configuring the MAC regs which in turn configures the PHY registers via MDIO interface. Make sure the proper values (set up auto-nego, etc.) are written.
By default, in the Advanced Properties of your computer's ntk card, Speed & Duplex is set to Auto Negotiation.

As stated in #2, go carefully through the example design from Xilinx first.

First make sure that your interface is able to generate the proper Normal Link Pulse/Fast Link Pulse sequence and reply with the ACK bit set when it gets a FLP sequence from the switch's port for the basic step of auto negotiation.
Or, if wanting to start off very slowly, just generate Normal link pulses (100ns positive pulse every 16msec) and the switch will assume you are only going to do 10M Ethernet and you can work on decode packets at that rate.

wesleytaylor said:

I guess this is due to a layer 2 auto negotiation problem.

Click to expand...

Not to be nitpicky (yes I am being nitpicky ;-)) but unless they've recently changed the OSI model auto-negotiation is a layer 1 function not a layer 2 one. It's supposed to be done at the PHY level. see: [url]https://en.wikipedia.org/wiki/Autonegotiation[/URL]

Here is a description of the all the layers. [url]https://support.microsoft.com/en-us/kb/103884[/URL]