# Integrator for dual slope ADC

1. ## Integrator for dual slope ADC

Hello,

I have designed an integrator with 15 M resistance and 40 PF. The input is a single pulse with a width of 409Us and higher value is 700 mv and lower value is 100mv. The deintegration curve is exponential. How to make it linear?

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2. ## Re: Integrator for dual slope ADC

The deintegration curve is exponential. How to make it linear?
By using a regular dual slope scheme which performs deintegration with Vref, resulting in a linear ramp. See https://en.wikipedia.org/wiki/Integr...C#Basic_design

3. ## Re: Integrator for dual slope ADC

To make the discharge curve linear you need a circuit to generate a constant current such as a current mirror.

Here's
another article of interest.

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4. ## Re: Integrator for dual slope ADC

Hello,
Can you please elaborate a little constant current source should be added where in the circuit?

5. ## Re: Integrator for dual slope ADC

Can you please elaborate a little constant current source should be added where in the circuit?
Where in which circuit? You didn't show your circuit at all.

The commonly used dual slope ADC circuit (as in the above linked Wikipedia article) is based on an active integrator and won't need a current source, just switches the reference voltage to the integrator.

6. ## Re: Integrator for dual slope ADC

Originally Posted by FvM
Where in which circuit? You didn't show your circuit at all.

The commonly used dual slope ADC circuit (as in the above linked Wikipedia article) is based on an active integrator and won't need a current source, just switches the reference voltage to the integrator.
I used the same circuit as in wikepidea.. My design is integrating but I want to get perfect saw tooth waveform. I have attached the schematic of my circuit.

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7. ## Re: Integrator for dual slope ADC

I'm unable to recognize a dual-slope topology in your schematic. It looks more like single slope.

8. ## Re: Integrator for dual slope ADC

It is a dual slope topology instead of the control circuit I have given a PWL input. Integration time is 409 Us. I am initially doing the simulation for only one period as I will design the digital part later on.

9. ## Re: Integrator for dual slope ADC

O.K. we can't see the waveforms. To achieve correct integrator behavior, there should be no resistor R1 permantly connected parallel to the integration capacitor.

10. ## Re: Integrator for dual slope ADC

Originally Posted by crutschow
To make the discharge curve linear you need a circuit to generate a constant current such as a current mirror.

Here's
another article of interest.
Can you please explain why do we need a constant current circuit and where do we need to conect the constant current source in the op-amp?

11. ## Re: Integrator for dual slope ADC

Originally Posted by FvM
O.K. we can't see the waveforms. To achieve correct integrator behavior, there should be no resistor R1 permantly connected parallel to the integration capacitor.
I have tried using the circuit without the resistor, but it does not give proper integration.

12. ## Re: Integrator for dual slope ADC

You might need a reset switch in place of the resistor.

13. ## Re: Integrator for dual slope ADC

Originally Posted by FvM
You might need a reset switch in place of the resistor.
Do you mean the switch should be closed at the time of de-integration?

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Originally Posted by pritc
Do you mean the switch should be closed at the time of de-integration?
I have tried using a switch for the deintegration time instead of a resistor parallel to the capacitor. It looks like the circuit is not integrating at all. I have attached the waveform.

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14. ## Re: Integrator for dual slope ADC

In principle, a dual-slope circuit doesn't need a reset switch if it performs integration and deintegration phase alternatingly. Deintegration would stop when the integrator output voltage is exactly zero.

Practical dual-slope circuits implement an additional reset or autozero phase after deintegration. In this phase, a reset switch or equivalent reset circuit removes residual integrator charge and provides clean initial conditions for the succeeding integrator phase.

It seems to me that you are more guessing about dual-slope operation than clearly understanding the principle. You may get more clarity by studying existing dual-slope ADC implementations, e.g. ICs like Intersil ICL7106 or Microchip TC500.

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