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[Moved]: jitter influence on TDC

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Kristya

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Can anyone give some information about this topic?
background : The TDC is for 3-D radar for time measurement using a simple counter based structure.
question1 : If the clock is from a vco, will the jitter accumution affect the final results? If yes, then how much difference will it lead?
question2 : how the results show in the quantization error/noise view for jitter accumulation effects?What the shape of its PSD maybe show?
question3 : With a DLL for clock, the jitter accumulation mainly cancelled. how does jitter affect the final result?

Mainly, I want to find some articles related to this topic(title only is ok).Hoping for some directions.
 

Re: jitter influence on TDC

Hi,

Sure, the clock jitter will limit your TDC resolution. The final shape of the TDC PSD will depend on the TDC architecture.

A search on IEEE will have more information on this topic.
 

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