iqster
Newbie level 3
Hi,
I'm trying to generate a 193.16 Mhz clock using PLL for a particular VGA resolution (1920x1200@60Hz). I understand that this can be generated from a 50Mhz oscillator (that my board happens to have) using the following multiplier/divisor: 4829/1250. My version of Quartus (12.0 .. need old version for Cyclone 2) complains that this freq is achievable. I saw some docs that suggest that the multiplier and divisor can indeed not exceed 4096. Any thoughts on how to move forward? I'm a newbie doing this as a hobby so pls be gentle.
P.S. Hello from Toronto, Canada!
I'm trying to generate a 193.16 Mhz clock using PLL for a particular VGA resolution (1920x1200@60Hz). I understand that this can be generated from a 50Mhz oscillator (that my board happens to have) using the following multiplier/divisor: 4829/1250. My version of Quartus (12.0 .. need old version for Cyclone 2) complains that this freq is achievable. I saw some docs that suggest that the multiplier and divisor can indeed not exceed 4096. Any thoughts on how to move forward? I'm a newbie doing this as a hobby so pls be gentle.
P.S. Hello from Toronto, Canada!