RE : Timing violation where capture flop is being latched too early

Hello,

Im my design .. my launch flop's clock is 1.4ns and my capture flop clock is 10ns. The data is getting latched by capture flop in 4ps resulting in large negative slack and setup violation.

what would be the approach to solve this kind of situation.

Thanks,
S S Rayudu

I'm assuming the two values you provide are the clock periods of each clock.

These are asynchronous clock domains. I sure hope you correctly designed the interface between them and have syncrhonization logic between the two domains.

It is normal to add set_max_delay paths paths, or set_false_path (not my preferred method) for those cross clock domain crossing synchronizer paths.

S S Rayudu said:

Hello,

Im my design .. my launch flop's clock is 1.4ns and my capture flop clock is 10ns. The data is getting latched by capture flop in 4ps resulting in large negative slack and setup violation.

what would be the approach to solve this kind of situation.

Thanks,
S S Rayudu

Click to expand...

if they are async, it means they have no relationship whatsoever. the tool has to consider the absolute worst scenario, and that is the 4ps case you are seeing.

refer to ads-ee answer for how to fix it.

Normally, clocks were defined by coverting the target frequencies.
But look like your clocks were added some margin, say, 8-10% which make the constraint faster than actual freqs.
Could you confirm ?

If no, take above comments.

slutarius said:

Normally, clocks were defined by coverting the target frequencies.
But look like your clocks were added some margin, say, 8-10% which make the constraint faster than actual freqs.
Could you confirm ?

If no, take above comments.

Click to expand...

No margin were added

S S Rayudu said:

No margin were added

Click to expand...

Then, obviously they are async clocks. You can follow:

It is normal to add set_max_delay paths paths, or set_false_path (not my preferred method) for those cross clock domain crossing synchronizer paths.

Click to expand...