+ Post New Thread + Reply to Thread
Results 1 to 5 of 5

Thread: Question about cascode current mirror & subthreshold reg

  1. #1
    Full Member level 5
    Points: 6,246, Level: 18

    Join Date
    Oct 2004
    Posts
    267
    Helped
    8 / 8
    Points
    6,246
    Level
    18

    Cascode current mirror

    Hi,

    Suppose you have a cascode current mirror, M1 and M2, where M2 is the cascode device. Is it ok for M2 to go into subthreshold region over some corner particularly FF @ -30°C while M1 remains in saturation?

    Thanks

    •   Alt 

      Advertising

      advertising

        
       

  2. #2
    Junior Member level 2
    Join Date
    Apr 2005
    Posts
    24
    Helped
    1 / 1

    Re: Cascode current mirror

    Going into linear is ok. But subthreshold is not modeled properly. So I suggest avoid that



  3. #3
    Member level 1
    Join Date
    Dec 2003
    Posts
    32
    Helped
    1 / 1

    Cascode current mirror

    You should not let M2 level saturation any time, or the shielding property of cascode current mirror will be vanished. That is, the current is variated siginificantly with the output voltage, some nonlinearity will occur.



  4. #4
    Full Member level 2
    Points: 3,228, Level: 13
    opamp741's Avatar
    Join Date
    Jun 2004
    Location
    India
    Posts
    135
    Helped
    11 / 11
    Points
    3,228
    Level
    13

    Re: Cascode current mirror

    i agree with apollo..u can accept that transistor going into triode..but avoid subthreshold as much as u can..but slightly going into subthreshold is not a big issue..
    c ya



  5. #5
    Member level 1
    Points: 1,290, Level: 8

    Join Date
    Feb 2005
    Posts
    39
    Helped
    0 / 0
    Points
    1,290
    Level
    8

    Re: Cascode current mirror

    On my point of view you need to have both transistors in the saturate region to get the output impedence equal to gm1×gm2×rds2.
    When you are in triode region you are decreasing this output resistance , so you have now a bigger spread on your current due to VDS modulation and subtreshold is not good too (MOS very slow ).



+ Post New Thread + Post New Thread + Reply to Thread