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    Using sinlge pull-down resistor for inputs to mutiple Gates ito 74LS ICs?

    Hi,

    I am conducting Digital Logic Design LAB. I have taught them using pull-down resistors giving inputs to gates. But there is one confusion i have when giving an input (e.g., label A) to multiple gates' ICs can i use a single pull-down resistor or should i use separate pull-down resistors for separate gate e.g, i am giving an input A to a 74ls86 IC with a pull-down resistor of 1k ohm. If i am giving the same input to 6 different gates then should i use a single pull-down resistor and reduce the value of the resistor to adjust it according to the low level logic? or should i use separate 1k resistors to give inputs to separate gates?

    I do not have idea if i reduce the value of pull-down resistor how much should i reduce it to avoid any other problem like heating etc.

    Please suggest me accordingly so that i can give reference to students.

    Thanks

    •   Alt14th October 2016, 12:09

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    Re: Using sinlge pull-down resistor for inputs to mutiple Gates ito 74LS ICs?

    The problem description isn't completely clear.

    Pull-down resistor may be used for open 74LS inputs, not generally. The resistance value has to be adjusted according to logic fan-in, typically 1k per 74LS unit load. If multiple parallel inputs are open and should be optionally driven by a logic output (e.g. by plugging in a jumper wire), you must also observe maximum Ioh drive current.

    Please clarify the intended circuit.

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    Re: Using sinlge pull-down resistor for inputs to mutiple Gates ito 74LS ICs?

    Hi,

    There is no general need for pullup/pulldown.

    But you need to ensure valid logic levels in either case.
    Only couple logic families have a valid logic level when unconnected, most logic families inputs are not defined when not connected.
    Therefore my general recommendation is: not to leave logic inputs unconnected (Used gates as well as unused gates. Unless it is particularely written in the datasheet.)

    Each logic family has itīs own V_IL, V_IH, I_IL, I_IH specificatons, therefore you need to consult the datasheet. We all need to consult the datasheet.

    Example on 74LS00 (TI datasheet):
    Given: 5V supply, V_IH =2V, V_IL=0.8V, I_IH=20uA, I_IL =-0.4mA.
    Pulldown to ensure valid low level: R = V / I = V_IL / I_IL = 0.8V / 0.4mA = 2000Ohms. or less. --> use 1K (down to 0R)
    Pullup to ensure valid high level: R = (5V - V_IH) / I_IH = (5V - 2V) / 20uA = 3V/20uA = 150k. or less. --> Use 10k (down to 0R)

    Klaus

    Added:
    You asked to use ONE pullup/pulldown for multiple inputs.
    --> the theshold voltages wont change (V_IL, V_IH), but the current will be multiplied (I_IL, I_IH).
    Therefore you need to divide the (single) resistance value by the count of connected inputs:

    Example before:
    pulldown for 1 input: 2k
    for 2 inputs: 1k
    for 5 inputs 400R
    for 10 inputs: 200R
    .. and so on

    •   Alt14th October 2016, 13:53

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    Re: Using sinlge pull-down resistor for inputs to mutiple Gates ito 74LS ICs?

    Thanks alot.

    I still have one confusion for Input current for logic low for (74ls IC) I_IL = -0.6mA it is written under the column MAXIMUM. So, this value of current remains (neglecting slight variations) if we use less than 1k ohm resistance down to zero or this value I_IL can change (e.g., to -1mA) . I have read that pull-down resistance is used for current limiting so does this statement applies here?

    Also, does the same applies for the value of I_IH=20uA (Input current for logic high)? Does it vary by changing pull-up resistance?

    Thanks alot

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    Re: Using sinlge pull-down resistor for inputs to mutiple Gates ito 74LS ICs?

    Hi,

    how to explain?

    The parameters V_IL, V_IH, I_IL, I_IH are IC internal parameters.

    The allowed voltage range for a valaid LOW level is 0.8V and below (TI 74LS00 datasheet).
    If you connect the input pin directely to GND you donīt have a problem. The current in/out of the input pin wonīt change pin voltage. You are always very close to 0V. Far away from the 0.8V limit.

    But when you connect a resistor, then every IC input current will fow through the resistor also. And current through a resistor causes a voltage drop.
    Letīs assume you connect a 10k pulldown resistor. And the true input pin current is 0.2mA (indeed it is -0.2mA, because the current comes OUT of the pin, so it is opposite direction to the IN-put.)
    This 0.2mA causes a 2V voltage drop across the 10k resistor. Means the pin voltage now is 2V. But this is NOT below 0.8V, so it is no valid LOW level.

    Klaus

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    Re: Using sinlge pull-down resistor for inputs to mutiple Gates ito 74LS ICs?

    Quote Originally Posted by burnishedcrystal View Post
    Hi,
    Please suggest me accordingly so that i can give reference to students.
    Thanks
    I might humbly suggest that this use of pull down resistors with bipolar logic falls into the realm of bad design practice.
    The problem is the variation of input bias current and logic low input threshold.

    Both vary widely for similar part numbers supplied by different chip manufacturers, as well as variations between individual parts.
    Its easy enough to design something that complies with one specific data sheet, but that may not always hold for a different brand of chip.

    To ensure its going to work at all, and have a reasonable reliability with multiple inputs tied together, usually requires an inconveniently low value pull down resistor. Its certainly possible, but not generally recommended practice.

    If multiple inputs have to be tied together, at the very least it might be best to drive the single input of a buffer amplifier, then fan out the output of that as required.

    Application of Schmidt triggers and proper voltage comparators on logic inputs fed from miscellaneous external devices should be known about and encouraged.
    Cheers, Tony.

    •   Alt14th October 2016, 22:17

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    Re: Using sinlge pull-down resistor for inputs to mutiple Gates ito 74LS ICs?

    Unfortunately the OP seems not to be able to give a reasoning for using pull-down resistors. Without further information I prefer to believe that they are just useless.

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    Re: Using sinlge pull-down resistor for inputs to mutiple Gates ito 74LS ICs?

    High value pull downs are fine with mos based logic, but become very ugly indeed with bipolar logic.
    Cheers, Tony.

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