Rahul Sharma
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Difference between Input common mode level & bias voltage for differential amplifier
Hi
If i have designed a common mode differential amplifier using nMOS structure (resistance as load). In this case what is the difference between input common mode level and Vbias for this circuit. What is exactly this common mode level if in i am using Vbias to set its operating point.
Next question is that i want to define CMRR than i will say "CMRR is a measure of how well the differential amplifier rejects the common-mode input voltage in favour of the differential-input voltage." How is it rejecting this common mode input voltage.
I think i understood first question properly then second will be understood automatically.
Hi
If i have designed a common mode differential amplifier using nMOS structure (resistance as load). In this case what is the difference between input common mode level and Vbias for this circuit. What is exactly this common mode level if in i am using Vbias to set its operating point.
Next question is that i want to define CMRR than i will say "CMRR is a measure of how well the differential amplifier rejects the common-mode input voltage in favour of the differential-input voltage." How is it rejecting this common mode input voltage.
I think i understood first question properly then second will be understood automatically.