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CS Differential LNA simulation problem !

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Ata_sa16

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Hi guys,

I have designed the single ended CS LNA and it is working properly,

However when I simulate the differential one with (Ls2 =Ls1/2). It shows totally wrong answers.

I used Ideal_Balun but i get NF of 14dB which is impossible ! I cannot understand what is my fault here !

d1.pngd2.pngd3.png

There should be something wrong with Baluns since those results are impossible !

- - - Updated - - -

OH! I found the problem myself finally ! In the output Balun the outputs and port 2 are placed in wrong sides !!!!

- - - Updated - - -

After correcting the Balun I get this results Do you think it is ok ?

d3.png

NF is 2.7 ! generally the noise figure of differential LNA is lower than single ended.

Do u think baluns add noise to circuit? I do not have any idea. Baluns are ideal ones !
 

generally the noise figure of differential LNA is lower than single ended.
Wrong.
NF of differential amplifier is always larger since noises are uncorrelated.

Do u think baluns add noise to circuit?
If you use "analogLib/ideal_balun" in Cadence dfII, it is noiseless.
 
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You are right but if you calculate the noise figure for diff LNA you can see its is divided by 2 !

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But the thing is in calculation we ignore noise of iductors since we assume high Q. Probably here number of Ls are dubled so noise is increased?

Thank you for advice. You think 2.7 is reasonable ? I cannot decrease more than that !
 

but if you calculate the noise figure for diff LNA you can see its is divided by 2 !
Can you understand NF correctly ?

Consider transistor numbers required for diferential LNA and single-ended LNA.
Diiferential LNA requires many transistors than single-ended LNA.
This is a reason why NF of differential LNA is always larger than single-ended LNA.

NF of half circuit alone is lesser than NF of full circuit in your case.

However if we compare NF of differential LNA at single-ended drive and differential drive,
NF of latter is lesser than former one.
It could be 3dB at best case.
However it is at most lesser than 1dB in many cases.
This is due to relations about source impedance, equivalent current noise and equivalent voltage noise.

But the thing is in calculation we ignore noise of iductors since we assume high Q.
Probably here number of Ls are dubled so noise is increased?
I don't think so.

You think 2.7 is reasonable ?
I cannot decrease more than that !
Show me noise contribution.
Or try to disabel noise of any instance by the following method if you use Cadence Spectre.

https://www.edaboard.com/threads/353014/#3
Set "noiseon_inst[...]" or "noiseoff_inst=[...]" in options statements.
 
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Consider transistor numbers required for diferential LNA and single-ended LNA.
Diiferential LNA requires many transistors than single-ended LNA.
This is a reason why NF of differential LNA is always larger than single-ended LNA.

NF of half circuit alone is lesser than NF of full circuit in your case.

.

Yes it seems like that at the beginning. But you are wrong !

If you calculate the noise figure of single and differential LNA you can observe that. It is also available in text book.

As I mentioned before, in calculating NF we do not include loss of inductors. but since here we use on-chip inductors, they suffer from low IQ and consequently high noise.

So I am sure that the NF is high because of this, not the topology itself.

- - - Updated - - -

Show me noise contribution.
Or try to disabel noise of any instance by the following method if you use Cadence Spectre.

https://www.edaboard.com/threads/353014/#3
Set "noiseon_inst[...]" or "noiseoff_inst=[...]" in options statements.


1) Autonomous-HB-PSS/Pnoise

(2) Autonomous-Shooting-Fullspectrum-PSS/Pnoise with augmented=on and augmented=off in Cadence APS
**broken link removed**

(3) Set "noiseon_inst[...]" or "noiseoff_inst=[...]" in options statements.

Noise parameters
49 noiseon_inst=[...]
The list of instances to be considered as noisy throughout noise analysis, which include, noise, sp noise, pnoise and tran noise.

50 noiseoff_inst=[...]
The list of instances not to be considered as noisy throughout noise analyses, which include noise, sp noise, pnoise and tran noise.


I know PSS/Pnoise simulation. But what is Autonomous-HB-PSS/Pnoise ?!!
I dont find these things.

Can u explain a bit more ?
 

Yes it seems like that at the beginning.
But you are wrong !
If you calculate the noise figure of single and differential LNA you can observe that.
It is also available in text book.
Surely read text book.

NF of true differential amplifier is always worse generally.

However your circuit topology is pseudo-differential which consistutes from completely same two circuits.

NFhalf = 1 + Na/(|Av|^2*Nin)
NFfull = 1 + 2*Na/(|2*Av|^2*Nin)

So NFfull < NFhalf

NF of true differential amplifier is always worse generally.

NF of CS-Amplifier using only one transistor is minimum.

I know PSS/Pnoise simulation.
But what is Autonomous-HB-PSS/Pnoise ?!!
Your case has no relation to Autonomous-HB-PSS/Pnoise.

Can u explain a bit more ?
PSS Analysis for Autonomous circuit.

As I mentioned before, in calculating NF we do not include loss of inductors. but since here we use on-chip inductors, they suffer from low IQ and consequently high noise.
So I am sure that the NF is high because of this, not the topology itself.
Show me noise contribution results.

Can you understand source impedance which is seen by each gate of MOSFET is 25ohm in your case, since you use ideal_balun.

https://www.edaboard.com/threads/352410/#2

This 25ohm might be far from Zopt for NF.
 
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See Example-5.25.

That is for CG LNA I am simuation CS LNA.

.


That is for CG LNA I am doing simuating for CS LNA.

In CG Nf is larger but in CS is lesser than single ended version.

Show me noise contribution.
Or try to disabel noise of any instance by the following method if you use Cadence Spectre.
.

How can I do this ???
 

That is for CG LNA I am doing simuating for CS LNA.
Wrong.
See Figure-5.69 in Example-5.25.
This is a general amplifier not CG LNA.

Surely read chapter-5 throughly.

In CG Nf is larger but in CS is lesser than single ended version.
https://www.edaboard.com/threads/219613/#7

Still you are misunderstanding.
Surely read chapter-5 throughly.

NF of single Transistor CS amplifier is lowest.

How can I do this ???
Noise contribution is available as post processing.

This is true for any simulator such as Cadence Spectre. Synopsys HSPICE, Keysight ADS and GoldenGate.
 
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Wrong.

This is a general amplifier not CG LNA.
Wrong.
This is a general amplifier not CG LNA.

Surely read chapter-5 throughly.

I have read all the chapter word by word and calculated for myself too.

You CANNOT generalize any topology and say its NF is high. It completely depends on your topology. Example 5-26 tells the same thing.

If your read the example carefully, gain of bot amplifiers are assumed A/2 which is not true ll the time.

Sometimes Differential LNA has more gain which changes the NF.

If you do not believe I can calulate step by step and compare both LNAs (Single and diff). At the end you can judge yourself.


For example Gain of single ended CG is R1/2Rs but for diff LNA is R1/Rs which is assumed same in that example.
 

Thank you for help anyway I appreciate. I never insist on sth I dont know it for sure. but I am sure about this


Show me noise contribution.
Or try to disabel noise of any instance by the following method if you use Cadence Spectre.

you told me this. How can "disabel noise of any instance". U said follow this method but then you said its pss simulation which is not related to noise.

I am confused 8-O:-?
 

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