Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

TDC circuit for use in CDRs

Status
Not open for further replies.

ngox

Member level 2
Joined
Aug 4, 2011
Messages
50
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,718
Hi, I am trying to find examples of TDC used in CDRs for use between the phase detectors and digital loop filter. Thus far I could only find TDC for use in frequency acquisition in PLLs, and nothing really for CDRs. A large number of TDC circuits I found for PLL use the lower-speed reference clock as a sampler, but that option is not really available for a high-speed CDR with random data input.

Any help pointing me in the direction regarding example literature or key words that I may be missing would be most appreciated.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top