Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Current mirror and mismatch

Status
Not open for further replies.

AMSA84

Advanced Member level 2
Joined
Aug 24, 2010
Messages
577
Helped
8
Reputation
16
Reaction score
8
Trophy points
1,298
Location
Iberian Peninsula
Activity points
6,178
Hi guys,

I would like to make a small experiment regarding current mismatch in a current mirror for different transistors area (or sizes).

I know that we have to do that using monte carlo (or maybe the dcmatch can work, I don't know). But the thing is how should I do the calculation to get the mismatch? And should I use any kind of special circuit alongside with the current mirror?

Regards.
 

I would use the Monte-Carlo simulation.
The result should be like the bigger transistors have lowest mismatch (standard deviation Std.Dev).

So, use the Std Dev parameter as a mismatch factor.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top