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Altera ALTERA_MULT_ADD registering the multiplier output

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shaiko

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Hello,

On an Aria V FPGA - I want to use the ALTERA_MUL_ADD core.
https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/ug_lpm_alt_mfug.pdf
( Page 47 )

I want the output of the multiplier to be registered and the output of the multiplier register to drive the input of the adder - all in the same DSP block.
Looking in the documentation and playing with the core generator I can't see that such a configuration is possible.
It seems like within the same DSP block, there's no way to register the multiplier's output and connect this register to the adder stage.

Is my observation correct?
 

As mentioned in your previous thread https://www.edaboard.com/threads/356807/, you need to look for the hardware features of your FPGA family. E.g. Cyclone V doesn't provides registers between multiplier and adder. I'm not sure for the high performance FPGA families.
 
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    shaiko

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you need to look for the hardware features of your FPGA family
Click to expand...
And as I wrote in #1 - this is exactly what I'm doing:
Looking in the documentation and playing with the core generator I can't see that such a configuration is possible.
Click to expand...
But I can't find any reference to a registered multiplier output (regardless of family) - which seems rather odd, so I thought I was missing something.
 

I think you can take a shortcut. Determine that the used DSP block has no registers between multiplier and adder and give the idea up.

Stratix to Stratix IV provide DSP blocks with pipeline registers between multiplier and adder.
 
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shaiko said:
Hello,

On an Aria V FPGA - I want to use the ALTERA_MUL_ADD core.
http://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/ug_lpm_alt_mfug.pdf
( Page 47 )

I want the output of the multiplier to be registered and the output of the multiplier register to drive the input of the adder - all in the same DSP block.
Looking in the documentation and playing with the core generator I can't see that such a configuration is possible.
It seems like within the same DSP block, there's no way to register the multiplier's output and connect this register to the adder stage.

Is my observation correct?
Click to expand...

If you'd have read the Arria V documentation rather than the altera_mul_add documentation, you'll see it's not possible, and you wouldnt have needed to post here:
http://documentation.altera.com/#/00020953-AA$NT00072716
 
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