Kosyas41
Member level 3
Hello,
Im trying to write mapper for BPSK modulation and I write next code.Could you pls check this code.is it works correctly or not
Im trying to write mapper for BPSK modulation and I write next code.Could you pls check this code.is it works correctly or not
Code:
--mapper
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_signed.all;
entity bpsk is
port(
clk : in std_logic;
d :in std_logic;
q :out std_logic_vector(1 downto 0)
);
end bpsk;
architecture bpsk_arch of bpsk is
begin
process(clk)
begin
if (clk'event and clk='1') then
if d ='0' then
q<="01";
else
q<="11";
end if;
end if;
end process;
end bpsk_arch;
