Does anyone use open source tools to get chips fabricated ?

I am drafting a home project like this guy to design an op-amp or any good analog circuit that may help me improve my analog IC design skills.

After researching over the internet, I didn't want to spend a fortune on EDA design tools. So I was looking at open-source IC design tools like Electric, magic and toped (micron). Does anybody have any experience with such tools in getting chips fabricated ?

Also, I came across a design website called efabless.com over reddit. Does anyone have experience with them ?
Thanks.

PS Any cheap foundries for home projects besides MOSIS ?

I've been watching this for decades and haven't seen
a tool set I want to bet my mask and wafer costs on,
nor any that have decent PDK support for any foundry
I want to use. MAGIC you may find some MOSIS support
for.

There is no such thing as a home project $$$ foundry.
You can get "bargain" multiproject access (a mere few
tens of thousands of dollars for a handful of bare dice
in the end) at some foundries but you have to work
that deal if MOSIS isn't setting it up for you. And often
this deal depends a lot on belief in future business.

Now, designing yet another op amp is one of the least
useful projects you could pick. Talk about an overserved,
hypersegmented market.

First, get real about whether this is ever going to get
real. If it's only educational than many half-capable
design tools would do. It's the backend (layout through
verification and, critically, database acceptance where
you will almost certainly be required to pass a Caliber
golden tapeout verification - and you can't afford a
Caliber seat, unless your hobby has a very rich uncle)
that will hang you up. Who did the work to make your
free tools run absolutely identical to the golden deck?
For that matter, who added the missing DRC/LVS
capability at all?

Electric is a kooky platform, its database fundamentals
are way different and its internal LVS depends on the
"arc" construct in layout which cannot be rebuilt for
streamed-in DBs. It's a one-way, forward-only, ticket.
You can't pull in a GDS file, touch it and reverify it.

LASI is/was another interesting tool set. It has at least
a DRC, and can put out a SPICE deck from layout so
you could use a SPICE:SPICE netlist equivalence LVS
(good luck finding one, open source). It may have not
added much modern foundry support but had some at
least.

dick_freebird said:

I've been watching this for decades and haven't seen
a tool set I want to bet my mask and wafer costs on,
nor any that have decent PDK support for any foundry
I want to use. MAGIC you may find some MOSIS support
for.

There is no such thing as a home project $$$ foundry.
You can get "bargain" multiproject access (a mere few
tens of thousands of dollars for a handful of bare dice
in the end) at some foundries but you have to work
that deal if MOSIS isn't setting it up for you. And often
this deal depends a lot on belief in future business.

Now, designing yet another op amp is one of the least
useful projects you could pick. Talk about an overserved,
hypersegmented market.

First, get real about whether this is ever going to get
real. If it's only educational than many half-capable
design tools would do. It's the backend (layout through
verification and, critically, database acceptance where
you will almost certainly be required to pass a Caliber
golden tapeout verification - and you can't afford a
Caliber seat, unless your hobby has a very rich uncle)
that will hang you up. Who did the work to make your
free tools run absolutely identical to the golden deck?
For that matter, who added the missing DRC/LVS
capability at all?

Electric is a kooky platform, its database fundamentals
are way different and its internal LVS depends on the
"arc" construct in layout which cannot be rebuilt for
streamed-in DBs. It's a one-way, forward-only, ticket.
You can't pull in a GDS file, touch it and reverify it.

LASI is/was another interesting tool set. It has at least
a DRC, and can put out a SPICE deck from layout so
you could use a SPICE:SPICE netlist equivalence LVS
(good luck finding one, open source). It may have not
added much modern foundry support but had some at
least.

Click to expand...

Thank you dick_freebird.

This boils down to two options - either enroll myself in a university or perhaps evaluate efabless.com

Either way, I really like the idea of being hobbyist in IC design space. The only problem - unlike HAM radio or arduino world, IC design is an insanely expensive hobby. Why do we have this impression that open source tools being free can't do a good job as Caliber or Cadence's tools ?

You also said this :

I've been watching this for decades and haven't seen
a tool set I want to bet my mask and wafer costs on,
nor any that have decent PDK support for any foundry
I want to use. MAGIC you may find some MOSIS support
for.

Decades !!! Is the IC design space that dominated by industry players like Cadence, Mentor Graphics and Synopsys ?
Thanks again.

Either way, I really like the idea of being hobbyist in IC design space. The only problem - unlike HAM radio or arduino world, IC design is an insanely expensive hobby. Why do we have this impression that open source tools being free can't do a good job as Caliber or Cadence's tools ?

Click to expand...

Although ASIC design is not my knowledge field, I guess you likely answered the question by yourself. Design CAD tools are intended to draw a product that is supposed to be manufactured. Considering the exorbitant costs related to the production of a wafer, it would be expected a very restricted hobbyist audience to make use of these tools, and even smaller the skilled community able to give free support to the tool, even in the academic world.

I believe the ICED tools are now open source. I used them back in the 90s on full custom stuff. I am not sure if anyone supports it. You may be able to download it at **broken link removed**

It's more than an impression. You have several necessities.
One is the tools, and here you'll find that the "front end"
has a surplus of options while the "back end" goes begging
especially in the verification phase - yes, Electric and LASI
have DRC and Electric its own LVS (provided you have no
need to work on layouts not in the Electric native format,
including streamed-in databases).

Another is the foundry PDK. Here, you are basically screwed
with any freebie tools unless a university has done the work
of creating a "shadow PDK" for the tool set. Such a set will
never be "blessed" let alone maintained by the foundry. The
tape-in procedure has almost universally come around to an
in-house final verification run using a "golden"tool and deck.
Often Caliber, sometimes Cadence (as a rule Big Digital is in
the Mentor/Synopsys/Caliber camp while analog tends to be
Cadence/Assura). Me, I presently use Silvaco tools and find
it a struggle to get a PDK even at fabs which purport to
support the Silvaco tools - they may, but your flow? Not
necessarily. Silvaco has to do the work for converting the
more mainstream tools' format to their own. They can
read Caliber error reports but can't execute Caliber decks
directly. In such a mode you're stuck with a lot of back-and-
forth with the foundry who has to rerun the golden deck
every time you think you fixed the error-set. And you as
a hobbyist who represents no real business may find little
enthusiasm for delivering you the foundry's precious IP in
the first place.

Toped is a layout editor project which seems sort of dead.
Vintage 2012. No native DRC but aspires to display Caliber
($$,$$$/yr) results.

Paris/MGEN is an interesting tool set put public by a German
semiconductor company years back. I would have thought
that this was prime material for updating, it was their own
in-house front-back tool set and got the job done at one
time. But it's pretty silent.

ICED (iceditors.com) now displays Asian characters and
looks to have no IC design content. Last sane-appearing
mention looks to be about 2009?

LayoutEditor looks to be free in a downgraded version.
It mentions but fails to enumerate any "iPDKs" for an
actual foundry. Claims to work with OpenAccess PDKs
but... even the consortium members don't see eye to
eye.

Thank you dick_freebird for the wealth of information! I was wondering that if one was to use "open source" environment, obviously they will have a SPICE based back-end (i.e. model files written in SPICE instead of modern SPECTRE based model files from Cadence).

Given that all open source tools use SPICE based PDK, and let's say you even convince foundry people to give access to one of their SPICE written PDK model files, do you think SPICE is sophisticated enough to run <65 nm nodes ? I have no clue if BSIM uses SPICE. Sorry if I sound too naive.

I think you might need to do more model "binning" (like a different
model for the 65nm "digital", another for 70-100nm, another for
100-250 and yet another for "long" channels - depending on how
many of the advanced BSIM version (or PSP, or...) geometry fitting
params. Similarly there might be strain relaterr differences at very
narrow devices that need special treatment. But any of these could
be overcome by effort.

And that's the problem, getting a PDK of suitable quality (expectations
and applications vary) for a probably uncooperative foundry's process
(and the devices to pull the data from, to fit, likewise). Somebody has
to plow the road or you're going to spend a lot of time with the machete
cutting your own trail the hard way.