Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Power routing is often a built-in feature of standard cell
libraries, at least the local power routing that runs on
metal1. I would do a rough power hookup first, at a relaxed
row pitch, then clock, then data, then tighten up the
whole core (possibly revising power) once you know
what you've got.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
