exp
Full Member level 1
Hi,
I've build an RC integrator (28nm CMOS): A nonideal current source is sunk into an OTA with an integration cap in feedback. fu=400MHz, DC gain~73.38dB.
The step response looks as expected (time constant ~238.7ns, DC gain ~73.38dB):
For low frequencies (e.g. 6MHz, 10MHz, ...) the tran output is precicely as expected and achieves superior linearity for near rail-to-rail output swing (65 HD3 for 1Vpp with VDD=1.2V).
However, this is the transient response for 300 MHz (or 400MHz=fu):
This is output of stb analysis:
Attention: I added 180 degrees to the phase to obtain the conventional PM definition (it's known that Cadence subtracts 180 deg so that the margin can be read off directly).
Is this system stable? In my opinion yes: PM is has solid 62 deg, step response shows no ringing and no signs of instability.
If it's not a stability issue, any idea what else could it be? Why only at higher frequencies? Makes no sense :-(
Thank you!!
PS: Due to the exceptionally huge required GBP, the OTA is 3-stage FF compensated. It consists of three differential pairs (the load devices are also input devices) to have similar DC OP points. It uses two CMFB. If it helps I would add the schematic.
I've build an RC integrator (28nm CMOS): A nonideal current source is sunk into an OTA with an integration cap in feedback. fu=400MHz, DC gain~73.38dB.
The step response looks as expected (time constant ~238.7ns, DC gain ~73.38dB):
For low frequencies (e.g. 6MHz, 10MHz, ...) the tran output is precicely as expected and achieves superior linearity for near rail-to-rail output swing (65 HD3 for 1Vpp with VDD=1.2V).
However, this is the transient response for 300 MHz (or 400MHz=fu):
This is output of stb analysis:
Attention: I added 180 degrees to the phase to obtain the conventional PM definition (it's known that Cadence subtracts 180 deg so that the margin can be read off directly).
Is this system stable? In my opinion yes: PM is has solid 62 deg, step response shows no ringing and no signs of instability.
If it's not a stability issue, any idea what else could it be? Why only at higher frequencies? Makes no sense :-(
Thank you!!
PS: Due to the exceptionally huge required GBP, the OTA is 3-stage FF compensated. It consists of three differential pairs (the load devices are also input devices) to have similar DC OP points. It uses two CMFB. If it helps I would add the schematic.
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