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Cadence simulation problem

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tia_design

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My circuit is mixed signal design. for the digital part, it will cost me too much time to simulate it. Who can tell me the better ways to increase the simulation speed?
 

I'm interested too.
I normally simulate the digital part seperated using synopsis.
You can use ideal digital model from ahdl library to speed up the mixed-signal simu.
However, I guess there are better solutions.
 

tia_design said:
My circuit is mixed signal design. for the digital part, it will cost me too much time to simulate it. Who can tell me the better ways to increase the simulation speed?

i have used Hsim to simulate the mixed-signal design, it is very fast without concern much on accuracy.


regards,
smart
 

you can simulate your digital parts using maxplus, then get VHDL netlisting ,
combing it into cadence with your analog parts
 

u can use Artist of Cadence to carry out mixed-signal simulation by the following ways:
a: use a schematic view to present the analog part and a verilog view to present the digital part
B: creat a config view by hierarchy editor
C: define the IE(interface element)
D:then use the simulation tool sprectre-verilog to simulate the whole circuit



you also can refer to the online document of candence
 

hsim worked very good for me in running simulations for mixed signal circuits
 

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