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DC/DC converter power integrations tool

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mamech

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hello


I have used power integrations design tool "PIExpert" to design a DC/DC converter. I entered the parameters of the DC/DC converter to the PIExpert and it gave me the BOM, Schematic etc...

but it gave me a warning, that I do not understand what it means. The software wrote:
"Drain voltage close to BVDSS at maximum OV threshold. "

and it suggested the following solution:
"Verify BVDSS during line surge, decrease VUVON_Max or reduce VOR"

I have 2 questions:
1- what does this mean? and what is the expected impact for this warning?
2- what is the corrective action that I need to do? if I understand well, then this problem can be solved by adding a varistor, and connecting it with a in series, to prevent this surge , is this solution valid?
 

Hi,

I´m not familiar with PIExpert...

I´d start to read PIExpert documentation or online help.
especially on the values like: BVDSS, VUVON_Max and VOR.

Is it possible to implement a variator in your software tool...and see what happens?

Klaus
 
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    mamech

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VOR means “vout reflected”, and points to the fact that your design reflects a lot of voltage to the primary, and that there is danger of overvoltaging the fet inside the topswitch, or whichever package…

Yes, you need to read the datasheet and get the vds max of the fet in the topswitch….if you cant be sure of staying below that voltage then yes, you cannot use that part….
I mean you can adjust the turns ratio to reduce the voltage reflected to the primary…also you can have more dissipation in the rcd clamp so that you definitely don’t spike high above the vds max of the fet………..also, beware of overvoltage on the rcd clamp at startup or overload……you really need a tvs across the rcd clamp to be able to handle that………

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BVDSS means "breakdown voltage of the drain-source of the internal mosfet inside the controller"

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VUV_ON MAX means the maximum voltage at which the part does not come on, so I am not sure why that is relevant to your problem, because your problem is overvoltage
VUV_ON means "voltage undervoltage_on"
 
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    mamech

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Hi,

I´m not familiar with PIExpert...

I´d start to read PIExpert documentation or online help.
especially on the values like: BVDSS, VUVON_Max and VOR.

Is it possible to implement a variator in your software tool...and see what happens?

Klaus

Actually, the software tool does not permit adding a component and simulate the new performance. what i can do only is entering the parameters and the software calculates everything automatically.
 

VOR means “vout reflected”, and points to the fact that your design reflects a lot of voltage to the primary, and that there is danger of overvoltaging the fet inside the topswitch, or whichever package…

Yes, you need to read the datasheet and get the vds max of the fet in the topswitch….if you cant be sure of staying below that voltage then yes, you cannot use that part…

I found this in datasheet : 725 V rated MOSFET

This BVDSS I think, correct?


by the way, for more insight about the design, please look into attached pdf file.View attachment DC-DC converter supply.pdf
 

for more insight about the design, please look into attached pdf file
For more insights, we need to know at least the transformer windings ratios.
 

For more insights, we need to know at least the transformer windings ratios.

it is already mentioned in pdf file, but they are scattered . the transformer windings ratios :
primary no of turns: 100
bias no of turns : 12
secondary output 1 no of turns: 4
secondary output 2 no of turns: 5
 

O.K., VOR isn't the problem then, but you have set the overvoltage threshold much to high. Did you notice that the standard datasheet value for RLS is 4 Mohm?
 
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    mamech

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here attached is an ltspice sim of a flyback, which you can modify so that it is the same as your own, then you can see "into it". Its in the free ltspice simulator. Just change it to .asc, then open it, then hit the running man icon.
By the way, the power integrations site do have a specific forum which deals specifically with their chips.
 

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  • Flyback bias winding and transformer leakage.txt
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    mamech

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O.K., VOR isn't the problem then, but you have set the overvoltage threshold much to high. Did you notice that the standard datasheet value for RLS is 4 Mohm?


yes, I noticed this. I solved the problem by disabling the undervoltage protection, and reducing the maximum overvoltage condition in software.

- - - Updated - - -

here attached is an ltspice sim of a flyback, which you can modify so that it is the same as your own, then you can see "into it". Its in the free ltspice simulator. Just change it to .asc, then open it, then hit the running man icon.
By the way, the power integrations site do have a specific forum which deals specifically with their chips.


thank you . and yes, I know about their forums, actually I asked them first around 2 weeks ago, and till now no answer from any kind! that is why I tried to ask here.
 

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