u24c02
Advanced Member level 1
Hi .
I'm verilog old fashion user, I'd like to know systemverolog.
As i know, in systemveriog, some kind of blocks can interconnect by using interface.
But it does not know which signal whether input or output.
How do we know the signal's direction in interface.
( the reason of this question is that we don't know the port of direction) it makes so inconvenient.
I'm verilog old fashion user, I'd like to know systemverolog.
As i know, in systemveriog, some kind of blocks can interconnect by using interface.
But it does not know which signal whether input or output.
How do we know the signal's direction in interface.
( the reason of this question is that we don't know the port of direction) it makes so inconvenient.