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Performance analysis of flip-flop with different data activity?

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niteshtripathi

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Hello Everyone, I want to do the performance analysis of flip-flop with different data activity i.e at 0%,25%,50% and 100%. what should be the data input and clock input for flip-flop.
 

Not clear what exactly do you mean by that, but as a general answer to this somewhat general question, the testbench/stimulus format entries depends either on the language or tool that you're using for that simulation, as well as the result would mainly depends on the technology of the manufacturer standard cells.
 

Sir,

I want to give input with data input activity of 50%. What will be the pattern of clock and data input.
 

niteshtripathi said:
What will be the pattern of clock and data input.
Click to expand...

So far, I am not even able to assess whether I can help you with what has already been informed.

Strictly speaking, what are you talking about ?
  • The IDE tool
  • The language
  • etc...
 

Sir,
I have designed a d flip-flop in cadence virtuoso tool. In many papers i have seen that they have calculated the power dissipation at different data activity rate. I want to know what it that data activty rate. If i want to calculate the power dissipation at 50% data activiity. then how to give clock and data input. May be now u will get my quest. Sorry for inconvenience.

andre_teprom said:
So far, I am not even able to assess whether I can help you with what has already been informed.

Strictly speaking, what are you talking about ?
  • The IDE tool
  • The language
  • etc...
Click to expand...
 

Now it is clear, but unfortunately I'm not familiar with that tool.
 

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