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Error in DFlipFlop Placement constraint in VHDL Code

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msdarvishi

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Hello,

I wrote a code for DFlipFlop in VHDL to be used in a TOP module. I want to put the placement constraints (LOC or RLOC) in VHDL code in order to put the FlipFlop in a specifc SLICE. Here is the DFlipFlop code:



Code VHDL - [expand]
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entity DFF_1 is 
Port ( D : in STD_LOGIC; 
Q : out STD_LOGIC; 
CLK : in STD_LOGIC; --clock
RESET : in STD_LOGIC); --reset
end DFF_1;


architecture behavioral of DFF_1 is

Code VHDL - [expand]
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ATTRIBUTE        LOC  : STRING;
 
signal Qs : std_logic;
 
 
ATTRIBUTE LOC OF DFF : LABEL IS "SLICE_X"&INTEGER'image(12)&"Y"&INTEGER'image(30);
 
 
 
begin
 
process(CLK,RESET)
begin
if RESET = '1' then
Qs <= '0'; 
 
elsif RISING_EDGE(CLK) then 
Qs <= D; 
end if;
end process;
Q <= Qs ;
 
end behavioral;




for the flipflop location constraints I wrote the following commands:

Code VHDL - [expand]
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ATTRIBUTE        LOC  : STRING;
 
ATTRIBUTE LOC OF DFF : LABEL IS "SLICE_X"&INTEGER'image(12)&"Y"&INTEGER'image(30);




Then I got the following error messages:



Code dot - [expand]
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ERROR:HDLParsers:715 - "/export/tmp/darvishi/xilinx/BASIC_FPGA_TDC_Design_Me_part_by_part/TDC_FINAL_DESIGN_Sep_11th/Real_signal/My_idea/Design_with_ODC_injection/planAhead/Implemented modules/sources/DFF_1.vhd" Line 31. Attribute on units are only allowed on current unit.
ERROR:HDLParsers:900 - "/export/tmp/darvishi/xilinx/BASIC_FPGA_TDC_Design_Me_part_by_part/TDC_FINAL_DESIGN_Sep_11th/Real_signal/My_idea/Design_with_ODC_injection/planAhead/Implemented modules/sources/DFF_1.vhd" Line 52. The label DFF is not declared.
-->




Then, I did the following trial:

ATTRIBUTE LOC OF DFF_1 : entity IS "SLICE_X12Y30";

and I got the same error.


Can anybody let me know how to solve it?

Thanks and Regards,
 
Last edited by a moderator:

The correct syntax for attribute loc is as follow : attribute loc of {signal_name| label_name}: {signal |label} is “location”;

Try with this syntax : ATTRIBUTE LOC OF Qs : signal is "SLICE_X12Y30"; -- Assign Qs signal to SLICE X12Y30

In your first attempt, there was no label called DFF. To make it working, you should instantiate a DFF primitive and connect it to your DFF_1 entity ports. You should give a label to the instantiated DFF.
 

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