common centroid in layout design

Hi can anyone please explain me what the common centroid in layout design is? In general can anyone tell me what matching is. Is matching something got to do with say a current mirror and the ratio of the say 3 transistors in the current mirror should be same (the L and W). But i did layout design and i was told to make some changes as it wasnt well matched and i was taught about say 2 cells A and B and their 4 arrangement of theirs as
AB BA, AB AB.... what does this mean??? If i have two transistor i just connect them directly. why do i have to make them AB like that. What is the need. And how am i supposed to find which transistors like that need that arrangment. As i thought all transistors play a part in the design and evrything should be proper. And i was told matching is done between ratio of the transistor. What does ratio between transistors mean? i am thinking say if in current mirror if one has (L=1u and W=1u) then the ratio of 2 of another trans will be (L=2u and W=2u)... So when i have given them right dimensions how does matching play a role????

Start here...

**broken link removed**

What you draw and what you get have a few steps in
between, and some of them are subject to systematic
error in printing (layer-layer offsets, field loading effects,
doping & oxide thickness gradients etc.) and in operation
(thermal gradients, strain effects). These bits of layout
art mean to minimize the effects of such things by
symmetry.

Common centriod is one of the layout strategies to mitigate the effect of parasitics.
This technique helps in cancelling the effect of parasitics.
Consider this example: If we have no. of negatives equal to no. of positives, overall effect will be null.
Similarly if you can allign transistors along some axis symmetrically, the parasitics will cancel out

Thank you for all your reply!!! I did understand it is used to reduce some errors that may occur during fabrication even if we laid the transistors with the correct dimensions. My problem is how am i supposed to find like which transistors should be paired like ABAB and which can be seperate on its own. Becoz i saw some layout examples. suppose say 12 transistors. They pair up like 2 transistors togethr like that. So my question is choosing those pairing does it depend on any factor say must one transistor function be dependent on the other??? This was wat i was told too and current mirror was given an eg. But my circuit has other strcuture not current mirror. if we see it like that then isnt every transistor dependent on one another becoz all together forms the whole circuit. Pls help. Thank you!!!

In such case better show your circuit!

also the thing i understood so far is like say we have two matched transistors. A and B and both are of W=4u and L=4u (for eg). So interdigitzation is nothing but say if A is too big we use fingers to split the gates. So now we get 2 A and 2 B... each of now split so which will be W=2u and L=2u. And now these 4 transistors can be arranged as
AB BA or like BA BA.. and then we connect all A's together and B's so they form a single whole A and B just that they are split... This is interdigitzation...

Now common centroid is the same but i think we arrange it as like X fashion.
AB
BA...
only the arrangement changes in common centroid.. So same here we connect the A and A together and same with B making it the two whole transistors A and B...

So be it interdigitzation and common centroid i understood that even if one A is der and if we use many number of A then it means we split them into many units. And common centroid or interdigitization we choose based on our design. I was want to make sure i understood correctly. Please correct me if i'm wrong.

- - - Updated - - -

Kindly take a look at this too. "recompute ratios to include dummies" Eg-1:3:9 will be 1:3(dummy):3:9"....this i found in one of the site.... Now i understand A and B are of ratio 1:1.. if we split them they will have equal A and B. but if ratio is say 1:3 then we will have more B in the arrangement. I hope wat i saying is right. Meaning what to do if we have cases wer say der are 2 A and 4 B to arrange. How do we do the interdigitzation or common centroid in that case? 1:1 ratio is kind of straighforward.. So can anyone please explain how to do when the ratio is like 1:3:9.... Thank you!!!!

Common centriod technique is not limited to current mirrors or differential pair circuits. One can split a large transistor into possible equal parts and use this technique.
One can help if you provide a snap shot of your circuit. It also depends on individual, which group of transistors he/she wants to apply this technique.
One more thing, if you are using cadence, there is a beautiful utility called constraint manager, that will help you much...and hope ease your work.

I'm sorry... L is 4u.

i think you need to start with "cmos fabrication", then take a look on this one:
https://www2.engr.arizona.edu/~brew/ece304spr07/PowerPoint/A_Hastings(4_4_05)[1].ppt

they are well linked with layout work.
hope that can help .