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Oscillator Output Impedance in Cadence

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megaknaller

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Hello guys,

I am designing a differential common collector Colpitts VCO and as usual I am taking the output from the collector of the transistor. This output will go into a buffer stage so therefore I am trying to design a matching stage between the buffer and the VCO so I can extract a good output power from the oscillator which will then feed the buffer stage. Due to the large signal characteristics of the VCO i need to find the large signal output impedance of the oscillator so i can design the necessary matching. How can I carry out this simulation in Cadence?

I appreciate any advice or explanation how to perform this analysis.

Thank you in advance,

Megaknaller.
 

Hi Brad,

That's correct, therefore I am extracting the signal through the collector so I can use the transistor as a first buffering stage itself. The next thing to consider is then, how to transfer this extracted power to the buffer in an efficient way, and there is when I stumble upon the matching stage between the buffer stage and the collector of the transistor. I think I have to find the large signal output impedance of the oscillator seen at the collector so I can match the input of the buffer to the output of the transistor. The thing is I don't know how to simulate this in Cadence.

Any comment is very useful to me. Thank you.

BR,
Megaknaller
 

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