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[Moved] Output voltage level of synchronous boost converter

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areebaa

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hi,
I used few simulation tools to verify the simple boost converter. later i designed the same in cadence . but the output voltage level is not enough in Cadence spectre. in simulation tools matlab and psim it was 3V but in cadence it reduced to 2V. i revised gate drive transistors size etc but the output is not increasing to desired level. any help will be appreciated.
vin = 1.6
 

Any waveforms or schematics would help.

What sort of process are you using? Are you using pmos or nmos for the synchronous rectifier?
 

synchronous boost converter
Click to expand...

It is easy to leave the output switch turned on after the coil discharges. The output capacitor starts to discharge back up through the power supply. Output voltage drops.

Did you confirm that no current goes in the reverse direction back up through the supply?

Did you try using a simple diode output switch (asynchronous)?
 
i tried without feedback control and with diode (asynch), just generating the timings from sources. it works but when i connect control block the output does not reach to desired level.
 

A boost converter is tricky to regulate. The control circuit must keep it switching on and off, continually, regardless of the feedback level from your output stage.

Therefore you should design it so the frequency and duty cycle cooperate, to produce your desired output level.

Most likely this will require a lot of time experimenting with a range of frequencies and duty cycles. This will tell you whether it is possible to achieve your desired output, and it will tell you how to design your control circuit.
 
yes, i already calculated and designed the control in PSIM , where everything works well . but i migrated to cadence this problem occurs.
 

yes i m using synchrnous rectifier , pmos as hi side and nmos as low side.
 

Can you confirm that both nmos and pmos are being driven deep into triode/cutoff regions? And that their is no cross conduction?
 

mtwieg said:
Can you confirm that both nmos and pmos are being driven deep into triode/cutoff regions? And that their is no cross conduction?
Click to expand...

sorry i cannot understand , bcoz in triode region the Rds will increase and thus increasing the voltage drop across nmos/pmos.
 

Triode region is defined by Vgs>Vt and Vds<Vdssat, which includes the ohmic region where you want to operate. What is your overdrive voltage, and what is the Vds during the switching period?
 

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