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How 2 FF synchronizer solves metastability issues?

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biju4u90

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How does a 2 FF synchronizer solve metastability issues whereas 1 FF synchronizer doesn't?? Many documents say that due to set up or hold violations at the first FF, the output of the FF may go to metastable state. Usage of the second FF drives the data to a stable value. But I also read that the data output of the second FF may or may not be correct because the input to it is a metastable value. If we can't assure the reliability of the data output, what is the point in avoiding metastability by adding the second FF??
 

It's not avoiding metastability, it is the reducing metastability.
When a flop goes metastable, it takes some time for the output to be stable. So if your clock frequency is too high then it may take more then 2 clock cycles for output to be stable and then you need more then 2 flops for synchronization.
In short metastability depends upon MTBF. As many as flops you will add for synchronization, MTBF will be high.

Refer this link
https://www.asic-world.com/tidbits/metastablity.html


Regards,
Ashish
 

But I also read that the data output of the second FF may or may not be correct because the input to it is a metastable value.
Click to expand...

Your error of reasoning is as follows. You get a possible metastable state if you sample an input near a 0->1 or 1->0 transition. Both 0 or 1 would be correct values in this case. The purpose of the second FF is to retrieve a stable value, might be either 0 or 1, or if you look at a sequence of sampled values, it can be either 001 or 011 for a 0->1 transition.

As Ashish Agrawal explained, a synchronizer reduces the probability of metastable events to a small number, but it can't completely eliminate it.
 

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