Attenuation of the fundamental on a Sigma-Delta ADCm

Hello everybody! Recently I have designed a 2nd order Incremental Sigma-Delta ADC. I have two main concerns about my design:

1 - The goal was achieving at least 14 bits, but unfortunately after realizing the FFT in order to obtain the outuput spectrum, the fundamental is attenuated by 20 dB. I don't know which reasons can cause this effect, and I havent been able to find anything in the literature...

2 - Since it's not my job to design the decimator, I need to know realistic would be to think that the low-pass digital filter after the modulator (CIC+FIR) has a Fpass of 10 Hz and a Fstop of 20 Hz..

Any idea would be appreciated.

Thanks in advance, I have learnt a lot from this forum.

Perhaps this will help.

Hi Mark,

But your PSD does not show it actually works as an incremental ADC. Are you resetting your integrator?

hello Sarapisa,

I think it's not necessary to reset the integrator in order to check the performance of an incremental ADC. Maybe I'm wrong..

mark4444 said:

hello Sarapisa,

I think it's not necessary to reset the integrator in order to check the performance of an incremental ADC. Maybe I'm wrong..

Click to expand...

Hi
But you know the decimation filter in the I-ADC is different from conventional one. As long as you don't reset the DSM you probably cannot figure out if it works perfectly with ideal SNDR.
That's why!

Tnx

mark4444 said:

Hello everybody! Recently I have designed a 2nd order Incremental Sigma-Delta ADC. I have two main concerns about my design:

1 - The goal was achieving at least 14 bits, but unfortunately after realizing the FFT in order to obtain the outuput spectrum, the fundamental is attenuated by 20 dB. I don't know which reasons can cause this effect, and I havent been able to find anything in the literature...

2 - Since it's not my job to design the decimator, I need to know realistic would be to think that the low-pass digital filter after the modulator (CIC+FIR) has a Fpass of 10 Hz and a Fstop of 20 Hz..

Any idea would be appreciated.

Thanks in advance, I have learnt a lot from this forum.

View attachment 122374

Click to expand...

The know the level of strength of ur signal in the spectrum, u shld first state the Vref in ur design... The spectrum of ur output is plotted with respect to the Vref (the feedback voltages)..
The signal strength in dB is 20*log10(Vin/Vref) where Vin is the amplitude of the test input sine wave.