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[SOLVED] how to work with fixed point data?

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JKR1

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hi
I am writting a code that I use unsigned data type,now I want to do some comparison with fixed point data like 0.5,and devide by fixed point too,first I convert all data to fixed point with
Code: 
temp4 := u_fixed(temp3,3,-4);
temp3 is a 10*10 matrix,the array of the matrix is unsigned(7 downto 0).is it right?
for compiling the code,i add the "use ieee.fixed_pkg.all;" package.but I gave the error :
Code: 
** Error: (vcom-11) Could not find ieee.fixed_pkg.
how could I fixe it? thanks
 

What are you trying to compile in? modelsim 10+ will have the fixed package in the ieee library.
Quartus/Xilinx tools do not ship with 2008 support, so you need to include the '93 compatible versions of the fixed point libraries from here:

www.vhdl.org/fphdl

Looking at your code, then if temp3 is a matrix, then you need to call

Code: 
for i in temp'range loop
  to_ufixed(temp3(i), 3, -4);
end loop;
 

thanks for answering
my modelsim is Modelsim 6.5.
I think thats because I cant compile fixed point type,
I'm trying to write code for this pseudo code :
first divide all the data in a by 100, then
Code: 
for i in 0 to m 
if a(i)<0.2 then a(i)=0
elseif a(i)>0.8 then a(i)=1
else a(i)=5/3a(i)-1/3
end if
end loop
 

That is a very very old edition of modelsim (about 8 years). Any chance you can update?

Why are you dividing by 100? that is a non-trivial divide. Why cant you do it with a multiply instead (* 1/100)?

Fixed point works just fine, but with such an old verison of modelsim you'll have to compile the fixed point libraries yourself into your project.
 

Why should Modelsim 6.5 have problems with IEEE fixed point libraries? It's plain VHDL that should be understood by any VHDL compiler version.
 

FvM said:
Why should Modelsim 6.5 have problems with IEEE fixed point libraries? It's plain VHDL that should be understood by any VHDL compiler version.
Click to expand...

It has no problems - but newer version ship with the fixed point libraries included. 6.5 doesnt.
iirc, 6.6 shipped with the '93 compatible version, while 10+ uses correct 2008 versions
 

sorry but I cant,When I add "use ieee.fixed_pkg.all;" ,I had the error that I mentioned,then I add this package to my project: "fixed_pkg_c.vhd"
now I have these errors :
Code: 
** Error: C:/modeltech_6.5c/examples/fixed_pkg_c.vhd(22): Library ieee_proposed not found.
** Error: C:/modeltech_6.5c/examples/fixed_pkg_c.vhd(23): (vcom-1136) Unknown identifier "ieee_proposed".
** Error: C:/modeltech_6.5c/examples/fixed_pkg_c.vhd(25): VHDL Compiler exiting
do u have any idea what can I do now?
Why are you dividing by 100? that is a non-trivial divide. Why cant you do it with a multiply instead (* 1/100)?
Click to expand...
what do u mean by non-trivial?
 

the fixed_pkg_c.vhd compiles code into the ieee_proposed library. you will either need to create this in modelsim with the command:
vlib ieee_proposed

and then compile the fixed_pkg_c.vhd into that library:

vcom fixed_pkg_c.vhd -work ieee_proposed

or modify the source code to use the ieee library instead.

In your code, you will need to include the package like:

library ieee_proposed;
use ieee_proposed.fixed_pkg.all;

As for the 100 - all numbers are binary, and dividing by 2^n is trivial as it simply requires the number be bit shifted to the right.
For non powers of 2 - a divider circuit is needed that is very slow and uses a lot of logic. To speed it up you need to have it pipelined (which increases latency). You are much better off using a diver IP block for a divide rather than the "/" function.

But a multiplier is much better as most FPGAs now have dedicated multipliers so they use little logic and can run very fast with low latency (usually 1 clock).
 
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the fixed_pkg_c.vhd compiles code into the ieee_proposed library. you will either need to create this in modelsim with the command:
vlib ieee_proposed

and then compile the fixed_pkg_c.vhd into that library:

vcom fixed_pkg_c.vhd -work ieee_proposed
Click to expand...
I have these errors :
13.PNG

- - - Updated - - -

But a multiplier is much better as most FPGAs now have dedicated multipliers so they use little logic and can run very fast with low latency (usually 1 clock).
Click to expand...
what is the difference between (a/255) or a*(1/255)??
both of them have dividing.
 

both of them have dividing
Click to expand...
No. (1/255) is a constant calculated at compile time (of course presuming fixed point number system). Perhaps you should simply try both variants in synthesized hardware (after translating it from pseudocode to real HDL) and compare the resource utilization.

Regarding your first question. Did you change the library name syntax intentionally? Or just to try if it works though?
 
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try ieee_proposed, rather than ieee.proposed.
 
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thanks for answering,these errors accurs :
14.PNG
 

Im guessing you didnt compile the fixed_float_types.vhd into the ieee_proposed library. You need to run the following commands when you compile the file:

Code: 
#create ieee_proposed library
vlib ieee_proposed

#compile file into that library
vcom fixed_float_types.vhd -work ieee_proposed
 
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thanks for answering.
temp4(i) := --convert ufixed to std_logic_vector
Click to expand...
sorry but I didnt get what u mean?
 

15.PNG
I have these errors

- - - Updated - - -

sorry,I made a mistake...I reply wrong answer.
 

This is a simple file naming issue - please modify appropriatly
 

ok,sure.
do u know where should I copy the "fixed_float_types.vhd".I think I copy it in wrong place
15.PNG
 

you can put it wherever you want - just make sure you get the path correct when you compile it.
 

thanks for answering.
there isnt any place for getting the path.
 

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