shaiko
Advanced Member level 5
Hello,
Suppose I have a microprocessor/FPGA that I want to connect to DDR3 memory.
The width of the data bus is 32 bits.
Now, I have 2 choices:
1. Split the 32b into 2 groups (16 bits each) and put 2 chips on board.
2. Split the 32b into 4 groups (8 bits each) and put 4 chips on board.
The benefits of the first option are obvious: less power, less space, less layout effort, lower cost.
What are the benefits of the second approach?
Suppose I have a microprocessor/FPGA that I want to connect to DDR3 memory.
The width of the data bus is 32 bits.
Now, I have 2 choices:
1. Split the 32b into 2 groups (16 bits each) and put 2 chips on board.
2. Split the 32b into 4 groups (8 bits each) and put 4 chips on board.
The benefits of the first option are obvious: less power, less space, less layout effort, lower cost.
What are the benefits of the second approach?