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synthesizing verilog analog file

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krshnrdrpl91

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i need to synthesize verilog analog file of comparator to finally get transistor level netlist, can anyone help me, if it can be done by files provided by ncsu would be better as i have done my earlier work by ncsu provided lib files.

keenly waiting for any reply and thank you in advance
 

I don't know what is ncsu.

In general I can say that take the lib files which have been proven and tested to be working.
 

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