Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Reporting the timing of reg to reg paths in Cadence RTL Compiler

Status
Not open for further replies.
B

biju4u90

Full Member level 3
Joined
Dec 10, 2014
Messages
172
Helped
3
Reputation
6
Reaction score
3
Trophy points
18
Activity points
1,437
Is there any command in Cadence RTL Compiler that will report the reg to reg timing paths only? I see commands to report maximum number of min slack paths or commands to report timing from a starting point to end point. But I don't see any commands for categorizing the paths like r2r paths or input to register or register to output paths!
Can anyone please help?
 

you could create a cost_group reg2reg.
or
report_timing -from [all_registers] -to [all_registers], it will reports the worst path from / to registers.
 
That works @rca
Thank you.. :)
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top