ADC's, on-chip oscillator vs ext. clock signal & its impact in an analog environment.

ADC's, on-chip oscillator vs ext. clock signal & its impact in an analog environment.

Hello.

I have a lab power supply design which consists of a offline flyback converter followed by a linear post-regulator stage controlled by data converters and a micro-controller(µC). I need a 16bit ADC to replace my 24bit LTC2400, I knew that a LTC2400 was not the preferred choice and I have been told here on this forum with good motivation that such a resolution is not possible but I wanted to see for my self how those ADCs are used.

Anyway know I am looking for a 16bit ADC with at least some thousands samples per second(kSPS), single or dual channel works just fine but what I am discovering for the first time as I took a closer look at Analog Devices(AD) ADCs many of them requires a externally supplied clock. I knew that those kind existed but all ADCs I have used so far or even considered have never mentioned anything about an external clock so I have not worried about it.

The ADC's, there's two of them, will be used in the linear regulator/post-regulator circuit and as such they are very close if not in the midst of low-noise analog circuits and I'm biased to think that routing a high frequency clock signal to the ADC besides the high speed SPI interface spells trouble for my analog circuits and the final output voltage.

[1] Is there much difference for the noise concern in using a ADC with a internal high frequency clock or a ADC with a external high frequency clock?

[2] Would it be a valid tactic to use 1-2cm of rather wide tracks to lead the voltages to be measured away from sensitive circuits rather than having the ADC closer to those circuits?

[3] I have had a idea where I use a 4-layer PCB and utilize the top two planes for analog stuff and then the two bottom planes for all digital including the data converters so that the analog stuff has one ground and the digital it own ground, but when I learned about how high frequency signal returns very neatly follows the track that supplied the currents I instead thought to skip the hole analog/digital division and simply keep track of my digital signals and partition my PCB in areas that uses all four layers. This doesn't seem to become a question but rather a reflection that anyone are welcome to comment on if you have anything to say or add.

Regards

Re: ADC's, on-chip oscillator vs ext. clock signal & its impact in an analog environm

Hi,

You didn't mention what ADC or ADC technology you are referring, so we have to guess..

With delta sigma ADC you need a continous, fixed and low jitter clock.
Many SAR adcs don't need a clock for conversion.
Many ADCs have a serial interface, wich usually need a clock for data transfer.

All those clocks usually are well beyond the needed regulation speed of the power supply and thus can be filtered out.

A power supply is to supply power, and usually doesn't need that clean. 10mV rms noise is not that bad.
You are not designing a hifi audio amp, where 10mV RMS noise is relatively high.

Klaus

Re: ADC's, on-chip oscillator vs ext. clock signal & its impact in an analog environm

Clock jitter is of critical importance, since it degrades the ADC's "effective number of bits" (ENOB). Have a look at https://www.planetanalog.com/author.asp?section_id=483&doc_id=563962

Re: ADC's, on-chip oscillator vs ext. clock signal & its impact in an analog environm

Good point Klaus, I seem to tend to think in the line of how to get the lowest noise possible without regard for if I actually need to.
I need to keep better track of what levels of noise is relevant where.

It is going to be ether delta sigma or SAR, for some reason I have come to think that delta sigma might be more appropriate for DC signals but that might be because I always see slow delta sigmas and really fast SARs. Can one say that one(delta sigma) is better than the other(SAR) for DC measurements or does it depend on many different things?

On the other hand I would love to be able to detect the ripple with the ADC, and there are many 200kSPS SAR ADC out there and seeing as I will use a switcher that switches with a 20kHz rate 200kSPS should be able to give me some info on the ripple in the end though it will by that point have been heavily filtered. Note that such an idea is simply for fun.

I am mainly interested in SPI interfaces that goes well beyond I2C's 400kHz, and considering all I would have to learn in order to implement a external clock I will go with a ADC that does have it own clock or does not need one.
This relates to another thread I had forgot to write, the subject of the SPI interface and buffers/terminators. I have read things that convinced me to put small ~50ohm resistors in series with the SPI lines but I see that sometimes buffer IC's are used and I have gotten it in my head that those could be related to noise somehow, could that be the case?

Regards

Re: ADC's, on-chip oscillator vs ext. clock signal & its impact in an analog environm

Hi,

I'd rather go fir a SAR ADC.
Maybe they are more expensive than audio delta sigma, but they are more flexible.
You could just decide to convert and the next time you have the result. With low delay and not a single conversion latency.

This is good if you once decide to build a regulation loop.

Klaus

Re: ADC's, on-chip oscillator vs ext. clock signal & its impact in an analog environm

I was biased toward delta sigmas(without any reason) but I'll take your preference and are going with a SAR.
To be clear, are you saying/is it such as - that a SAR ADC is only sampling when I tell it to while delta sigmas are continuously sampling?

I have been troubled by my current over-kill resolution delta sigma ADC through me not having a way of detecting when a new result are available, I imagining that many such ADCs has the same function ie. it uses the first bit to be sent to the µC as a signal with the intent that I should use a external interrupt that is set to go of when the ADCs output/the first bit to be sent goes high to trigger the collection of the following bits in order to not let a new result sit waiting or even missed completely.
This is perhaps child's play if you are able to use a µC 100% with your own code for everything but since I use arduino and really heavily on there library's while having trouble controlling the SAM3X8E manually I can't quite see how I would use a interrupt to detect when a result us ready to be transferred, the only way I see is if I connect the ADCs output line to the SPI interface and parallel to that also connect the output line to a digital pin which is used as a external interrupt which when triggered then triggering my SPI transfer routine.
that might work but it just feel wrong and ugly but at the level of programming the arduino Due I am at I see no way of using the SPI interface to detect that "result is ready" indicator, it was some time ago but I will need to dive into SAM3X8Es datasheet anyway so I might as well look for that.

I place this in a code segment while it is not code because it is not relevant to the discussion at all, only loosely since I have to figure out how to use XMEGA with external ADC in the future.

Regards

Re: ADC's, on-chip oscillator vs ext. clock signal & its impact in an analog environm

Hi,

To be clear, are you saying/is it such as - that a SAR ADC is only sampling when I tell it to while delta sigmas are continuously sampling?

Click to expand...

Yes. Usully you can convert on demand. If you have a specific device in mind, then post it's name and we can check.

SPI controlled ADCs are slave devices.They only convert when they are active. They don't output anythin when they are not selected with the !CS signal generated by the master. When deselected then the data line is high impedance.

You may use a single sample, but you also may start convertions periodically, which may have benifits.

Klaus

Re: ADC's, on-chip oscillator vs ext. clock signal & its impact in an analog environm

Hello.

I will post as soon as I Seattle on a ADC, but just to say so. The LTC2400 if I have not misunderstood does convert continuously at a rate of 7Hz/7SPS but that might be only in one of its modes because now when I am writing I recall that I had to do something to get it to use its internal clock rather than a optional external supplied clock.

I'll have a couple of ADC to read more about before tying one, but I'll be back sometime today with a ADC.

Regards

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Just to help choose, the max sample rate I can use would be determined by the clock of the µC that is going to read it no?
Or could there be any way of buffering many samples faster than the µC can process them?

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I have just begun pondering if a parallel interface would be cool, that seems to enable greater speeds but it might be over kill for me, 16bit ADC would require 16+ digital pins and that need not be a problem though.

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I have been looking at SAR ADC with SPI interface and There are a cheap MAX11100 single 200kSPS ADC, but I am going to need two ADC if single, one for voltage measurement and one for current. The voltage measurement could be fine at anything above 1kSPS but as said previously I would like to be able to deduce ripple from the ADC readings and as such 200kSPS is fine. But I have a question about the sample rate for the current measurement.

I plan to implement a fully digital current control(for the linear post-regulator) rather than using analog circuits I plan to sample the current and with a µC running at 32MHz detect and take counter measures through software(ether I will make a new prototype testing this scheam or I'll make allowances on the PCB to solder in an analog solution if the digital scheam fails).

What do you think?
Could such a digital solution work or am I wasting time trying?

The point about the sample rate of the ADC monitoring the current is that I can spend more $$$ and get 400kSPS, 600kSPS or 1MSPS, with the thought of getting a faster more accurate response(maybe) and accuracy for when the limit is reached, the digital way is for me more fun and exiting whilst a analog solution seems as a safe card to go with implementing a current sense amplifier together with a comparator that compares the current-sense amplifiers output with a DAC output voltage, a I guess standard way of doing a thing like that.

Regards