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[Moved] Static Noise Margin Simulation for Ternary SRAM

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Siddharthpethe

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Hello,
I am trying to simulate Ternary SRAM cell. which can memorize logic 0,1,2 or in vtg level as 0v,1.5v,3v. I want to find simulation result for SNM of the ternary SRAM.

Please help.


1167491200_1431614426[1].jpg

SRAM cell SCHEMATIC

Thanks in advance.
regards,
Siddharth
 
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