Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

[SOLVED] error:metavalue detected

Status
Not open for further replies.

soujanya04

Newbie level 4
Joined
May 2, 2015
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
42
Hi all,

I am using xilinx ISE 14.7 and spartan 3e

The part of my VHDL code where I got error is::

Code VHDL - [expand]
1
2
3
4
5
if (kk<=x"010000")then
    bh := x"00";
else
    bh := x"01";
end if;



where

Code VHDL - [expand]
1
2
variable kk: sfixed(22 downto -1);
variable bh: sfixed(6 downto -1);


and packages used are::

Code VHDL - [expand]
1
2
3
library ieee_proposed;
use ieee_proposed.fixed_float_types.all;
use ieee_proposed.fixed_pkg.all;



Error I got in isim simulation is:

Warning: fixed_pkg:"<=": metavalue detected, returning FALSE

Error when synthesised :

ERROR:Xst:1749 - "D:/Xilinx proj files/mtech_2/fixed_pkg_c.vhdl" line 2083: error: fixed_pkg: Vector passed using a "to" range, expected is "downto"

Please help me with this issue., what is the error and problem in my code?
 
Last edited by a moderator:

The simulation warning comes about because kk has a value that is not all 0/1. Probably some unitialised value.

for the 2nd warning - did you take the Xilinx version of the fixed point packages?
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top