doragasu
Newbie level 3
I have been asked to implement a synchronous RS232 link. I have been reading documentation (googling and reading V.24 ITU-T recommendation), and I'm a bit confused about what I have to do.
If I understood correctly:
Both TX and RX signals are synchronized using:
a) either two different clock signals (one for TX, other for RX, both sent by the DCE to the DTE). These signals change at the same time RX/TX changes;
b) Or a single clock signal sent from the DTE to the DCE. This clock signal changes when the transmitted/received bit is at half its duration.
If option b) is used, option a) cannot be used and vice versa, right? I'm a bit confused about this.
Also when using option a), I suppose this can be implemented using two SPI ports (with level shifters), right? If this is the case, and I decide to use e.g. a PIC18F97J94, what would be the difference between using two of its MSSP ports (SPI mode) and using two of its EUSART modules? Isn't the protocol exactly the same?
If I understood correctly:
Both TX and RX signals are synchronized using:
a) either two different clock signals (one for TX, other for RX, both sent by the DCE to the DTE). These signals change at the same time RX/TX changes;
b) Or a single clock signal sent from the DTE to the DCE. This clock signal changes when the transmitted/received bit is at half its duration.
If option b) is used, option a) cannot be used and vice versa, right? I'm a bit confused about this.
Also when using option a), I suppose this can be implemented using two SPI ports (with level shifters), right? If this is the case, and I decide to use e.g. a PIC18F97J94, what would be the difference between using two of its MSSP ports (SPI mode) and using two of its EUSART modules? Isn't the protocol exactly the same?
