tenso
Advanced Member level 4
I am using modelsim for the first time and had a question about simulating Verilog files.
https://www.asic-world.com/verilog/first1.html#Counter_Design_Block
I was following the counter example in the link above. When I simulated the above counter testbench, no signals showed up in the Objects window. This simulation was done by checking the "enable optimization" box.
Repeating the simulation with the box unchecked or -novopt did produce the signals in the objects window and I could add them to the waveforms window.
My question was about optimization. What does it exactly do and when does one need it?
https://www.asic-world.com/verilog/first1.html#Counter_Design_Block
I was following the counter example in the link above. When I simulated the above counter testbench, no signals showed up in the Objects window. This simulation was done by checking the "enable optimization" box.
Repeating the simulation with the box unchecked or -novopt did produce the signals in the objects window and I could add them to the waveforms window.
My question was about optimization. What does it exactly do and when does one need it?