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Question about writing to external memory in Altera design

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nervecell_23

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I want to write to a DDR2 RAM from a custom architecture. The RAM has 64bits data width and runs at 400MHz. The custom architecture is interfering with the memory controller by using Avalon-MM interface. The memory controller is set to half-rate mode which means local data width is 256bits and one word on local side is equal to 4 words on memory side (4*8byte aligned).

My question is if I just want to write a 64bits word to the memory without damaging other content in it, is there anyway to do that (such as write byte-enable signal)? Since if I write a 256bits word to the memory with only 64bits that are meaningful, the other 192 dummy bits is going to replace the original content in the memory right?
 

As I don't have Altera tools installed anywhere I can't verify that local_be is generated on the ports of the DDR2 controller IP.

https://www.altera.com/en_US/pdfs/literature/ug/ug_ddr_sdram.pdf
pg 3-29 has the following table.
Capture.JPG
 

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