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Analog Layout Design

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umaganesh90

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Hi all,

I have one doubt in Layout mos structure.What is the reason behind that the poly gate extension from the diffusion layer both top and bottom.if anybody know that please reply me.....
 

Hi,

This is done to reduce gate resistance, also it makes the layout easier when you have to feed both DC and AC signal separately. Of course you pay in extra parasitic capacitance, so there's the trade off.
Usually in the PCELL you can set the gate connection, and it will be included within the model without further need of extraction.
You can always tweak the layout yourself until it will fit your requirements.
 

umaganesh90 said:
What is the reason behind that the poly gate extension from the diffusion layer both top and bottom.
Click to expand...

This is also necessary because of possible inaccuracies between active area and gate lithography mask adjustment. That's why you have appropriate rules in the DRCheck.
 

Hi...
just refer the attached picture...
87_1328370321.png[/URL]


For more details. Pls refer **broken link removed**

thanks & regards
jarilak.r
 

A few more notes on this:

1. Actually, extending poly line outside active will increase, not decrease gate resistance.

2. additional reason to extend poly outside active (to what has already been explained earlier in this thread) - very often (but not always) design rules require gate contact to be outside active - so, obviously, you need to extend poly outside active, to provide gate contact.
 

There may be another reason that, to protect the channel when doing diffusion, if it is not extended the lateral diffusion may occur.

Another reason Source and Drain have metal 1 for further connection. So it will be difficult if we want to use metal for gate connection.(If not too you can increase Poly,,)

The above ones are my thoughts.. Share your thoughts.. too
 

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