Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Whats wrong with this simple power supply?

Status
Not open for further replies.
J

Jester

Full Member level 6
Joined
Aug 18, 2012
Messages
377
Helped
7
Reputation
14
Reaction score
7
Trophy points
1,298
Location
.
Activity points
4,754
Has anyone ever seen this style of power supply before?

I have been asked to provide a PCB for the circuit shown below. The person that provided the diagram claims that he built one and it works fine and provides 12V at 2A. I'm skeptical to say the least.

All comments welcome please.
 

Attachments

  • psng.jpg
    psng.jpg
    141.4 KB · Views: 101
Last edited:

hi,
For starters, a PMOS is indicated in the d/s clip but a NMOS FET is drawn.
Also 12V from a 10Vmin source is not possible.
The 16Vz never conducts
Its all wrong.
E
 

Yup..

If I
- ignore the incorrect symbol and pin numbers and use a P-Channel FET with the Source oriented towards the Source (novel concept;-))
- and explain that with 10V in you might get close to 10V out
Perhaps it will work sort of, would be interesting to see what the output voltage is with +15V in when using the specified 16V Zener
 

If I understand it correctly, it does not regulate at all except as Over-Voltage Protection (>>16V) to shutdown by open circuit.

Once the 16V Zener is saturated, then Q1 turns on and saturates which turns Q2 off. Otherwise, Q2 is normally ON with P-FET bias to ground from R3.
 

SunnySkyguy said:
If I understand it correctly, it does not regulate at all except as Over-Voltage Protection (>>16V) to shutdown by open circuit.

Once the 16V Zener is saturated, then Q1 turns on and saturates which turns Q2 off. Otherwise, Q2 is normally ON with P-FET bias to ground from R3.
Click to expand...

That's what I get out of it. A crude over-voltage protection set for somewhere > 16V.

The intention may be to provide a low dropout protection (It's a straight pass-through at <16V in). There are of course may ways to do this.

If actual regulated 12V is required this isn't the way to do it.
 

Correct
the 12V notation is an error in documentation.
Perhaps the intent was to charge a 12V battery with OVP using series rather than shunt protection, which might make sense coming from a >100W alternator which would have its own voltage regulation unless it failed.
 

It seems we're all on the same page (excluding the fellow that provided the circuit diagram). I'm about to post another unrelated circuit in this section, perhaps you guys will have some ideas.

Thanks again.
 

Circuit is polarity protection of load connected on +12 point. Zener diode, resistors and transistor limits Vgs.
Circuit can be a part of battery supply.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top