Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

pole-zero anylysis of Telescopic Cascade op amp

Status
Not open for further replies.

Alles Gute

Full Member level 2
Joined
Dec 4, 2003
Messages
135
Helped
15
Reputation
30
Reaction score
10
Trophy points
1,298
Activity points
1,217
How to do the pole-zero anylysis of Telescopic Cascade op amp as shown?
 

The output pole "1/RoCL" is the dominant pole, and the pole in node A "gm7/CA" is the first non dominant pole.
And CA=Cgs7+Cgs8+Cdb7+Csb5+"the miller effect capacitor of Cgs5"
Right?

Can we disgard the poles in B,C,D,E while do phase margin anylysis?
 

No, but the most important are the poles in A and in B nodes. The others will be less significant for the behavior of the amplifier.

Bastos
 

remember two basic things. A pole is suppose to cause gain to decrease and a zero is suppose to be opposite, AND capacitors tend to be a short at high freq.

with this, the dom pole will be at the output. (Cload.Rout)
disregard the miller (Cds) first.
redraw the cascode CM load as simple CM, easier for analysis
there r two poles of interest next. 1st will be the CM diode, since it cause the gain to decrease if the Cgs is shorted out. ~(1/gm.2Cgs). only caused u to lose half of the gain though.
2nd will be the NMOS cascode pole at the source. I think this should be more dominant than the CM depending on the gm of this transistor. for comparable gm, this will be more dominant, as it affect the gain more than the CM pole.

u should make sure that the cross over is at least one decade below the next dom pole for optimal stability.
 

lastdance said:
remember two basic things. A pole is suppose to cause gain to decrease and a zero is suppose to be opposite, AND capacitors tend to be a short at high freq.

with this, the dom pole will be at the output. (Cload.Rout)
disregard the miller (Cds) first.
redraw the cascode CM load as simple CM, easier for analysis
there r two poles of interest next. 1st will be the CM diode, since it cause the gain to decrease if the Cgs is shorted out. ~(1/gm.2Cgs). only caused u to lose half of the gain though.
2nd will be the NMOS cascode pole at the source. I think this should be more dominant than the CM depending on the gm of this transistor. for comparable gm, this will be more dominant, as it affect the gain more than the CM pole.

u should make sure that the cross over is at least one decade below the next dom pole for optimal stability.

Do you mean COMMON MODE for CM?
 

Dear Alles Gute,
What is this miller effect of Cgs5 you talk about.
I have never observed it.
Next, I hope u have smaller lengths for PMOS connected to supply so the would have lower parasitic capacitance. I suggest lower lengthe as their Vds would be small which is dependent on your bias voltage for lower PMOS.
Assuming that vdsats for common gate transistors and the PMOS' are same I expect the Gm' to be same. As NMOS has more mobility than PMOS it would have smaller W/L and thus smaller Cgs thus mirror node would have higher probability of being the non-dominat pole. But all this is on the assumption and you W and L choice.
Else the fight for non-dominat pole is between source node of common gate amp or the mirror node
 

qslazio said:
lastdance said:
remember two basic things. A pole is suppose to cause gain to decrease and a zero is suppose to be opposite, AND capacitors tend to be a short at high freq.

with this, the dom pole will be at the output. (Cload.Rout)
disregard the miller (Cds) first.
redraw the cascode CM load as simple CM, easier for analysis
there r two poles of interest next. 1st will be the CM diode, since it cause the gain to decrease if the Cgs is shorted out. ~(1/gm.2Cgs). only caused u to lose half of the gain though.
2nd will be the NMOS cascode pole at the source. I think this should be more dominant than the CM depending on the gm of this transistor. for comparable gm, this will be more dominant, as it affect the gain more than the CM pole.

u should make sure that the cross over is at least one decade below the next dom pole for optimal stability.

Do you mean COMMON MODE for CM?

he means current mirror for CM..
 

Razavi's book gives some intuitive analysis of this circuit. You can get some idea there
 

Thank you all for the replies!

ambreesh said:
Dear Alles Gute,
What is this miller effect of Cgs5 you talk about.
I have never observed it.
Next, I hope u have smaller lengths for PMOS connected to supply so the would have lower parasitic capacitance. I suggest lower lengthe as their Vds would be small which is dependent on your bias voltage for lower PMOS.
Assuming that vdsats for common gate transistors and the PMOS' are same I expect the Gm' to be same. As NMOS has more mobility than PMOS it would have smaller W/L and thus smaller Cgs thus mirror node would have higher probability of being the non-dominat pole. But all this is on the assumption and you W and L choice.
Else the fight for non-dominat pole is between source node of common gate amp or the mirror node
Dear ambreesh,
I mentioned "miller effect of Cgs5" becouse I think Cgs5 is shared by the Node A and B. Or we can discard this capacitor during poles calculation?
BTW, there are two mirror poles here, A and B, and they are close right?

Added after 44 minutes:

Another question, when do noise calculation for the Telescopic Cascade op amp, the noise contribution of the four cascode transistor M3-M6 are often neglected, why?
 

I donot know much about noise, so shall not comment on it.
The miller effect shall come in place if u have negative gain. SO look for common source amplifier in your gain paths.
About the 2 poles I shall get back to you
 

If don't count in the Miller Effect, then we will have a RHP at infinity. By introducing the Miller, we don't.

When we consider the noise, we'd like to see the so called "input infered noise". The noise introduced by M3-M6 will be 1/gm^2 times less than M1 & M2, that's why they are ignored.
 

dear bloodemon,
please calrify at which node are we observing the miller effect due to Cgs5.
 

Dear Ambreesh,

You are right with the Cgs5. Sorry, I didn't read all the following posts carefully.

- Bloodemon
 

You can find some references in Razavi's book
 

hum, you are right, there is no negative feedback relate to Cgs5, hence there is no " miller effect of Cgs5", thank you all for the helpful replies.

Then how should the Cgs5 be dealt with? It should be included in node A or B or both?
 

The ploes in A and B would be the second non-dominant pole. But the dominant pole (output node), I think, is the most important. It affect the BW, and when you do Frequency compensation, you usually move this pole.
Yes Pa/Pb will affect the phase margin, make sure they are several times away from the unity gain frqeuency.



bastos4321 said:
No, but the most important are the poles in A and in B nodes. The others will be less significant for the behavior of the amplifier.

Bastos
 

From another point, Pa/Pb is very important. Since it limit the maximum Unit gain bandwith, so does the gain bandwidth product of the amplifier.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top