Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

need help with a part of my project

Status
Not open for further replies.

Spectre90

Newbie level 6
Joined
Nov 15, 2014
Messages
11
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
85
ok this might be confusing but bare with me....

im trying to make 12-bit stop counter where i have one button input that stop each 4-bits slots i'll put in my segment display module
whenever i press a button, it stops one segment to display a number and if i press the same button again, displays a number on the other display with the 1st still on, then same with the third display; the last display will be fixed values.

i made a block diagram to explain it better.


i need some idea to make this module

should i go with making 3 different module with an enable or state (or case) statement to implement

i hope the drawing helps
 

Attachments

  • block diagram.png
    block diagram.png
    26.3 KB · Views: 71

You need:
1. a debounce circuit on the Btn_in
2. a FSM to control which of the 3 counters you want to stop.
3. Now the spec gets fuzzy.

What is the counter supposed to do? Does it count binary from 0-(2^12-1) and you just extract the bits as [3:0], [7:4], and [11:8]? Do the counter bits for the upper nibbles count as if the lower nibbles were still counting, or do they count at the lower nibble count rate?

If you need to count always as if the 12-bit counter was always running and you are capturing the nibbles, then you should have:
3a. 12-bit counter
3b. 3 4-bit capture registers, to hold the nibble for each 7seg while you wait for next button press.

4. some way to reset the 7seg to try again.
 

It's more like 3x4-bit capture register
And it counts a binary 1 to 9 (4-bit loop). And it goes to the [11:8],[7:4] and [3:0] input of my 7 seg module. The [15:12] will be fixed values.

And yes there will be a reset register ... Or button to start back from the 1st segment slot
 

It's more like 3x4-bit capture register
mentioned that in 3b.

And it counts a binary 1 to 9 (4-bit loop). And it goes to the [11:8],[7:4] and [3:0] input of my 7 seg module. The [15:12] will be fixed values.
so does this mean each nibble (4-bit) counts at whatever clock you use? i.e. has no relationship to the other nibble counters.

And yes there will be a reset register ... Or button to start back from the 1st segment slot
don't forget to debounce that input too, if you use a button, and a synchronizer if the reset register is asynchronous to the counter.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top