Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

[moved] Converting a Verilog-A module to a PSpice netlist model

Status
Not open for further replies.
M

Manolis Grifoman

Newbie level 4
Joined
Jul 9, 2014
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
39
Hello! I am new to PSpice. I want to simulate a circuit in PSpice but the model I have in my disposal, is a Verilog-A file. How can I make a model in Cadence from this file? Or... Can I import this file into my PSpice netlist somehow? Thank you!
 

There is no direct way to translate verilog A to spice.
You need to use behavioral devices (E,F,G,H devices) and map the behavior from Verilog A to pspice.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top