Current Summation circuit

Hi guys,

Im try to make some easy structure that can sum current, for example black box which recognize if it sink 200nA or 280nA.
On the picture you can see that I make Branch replica of Bandgap ref, and I need something what can sense current through diode Q3 ( that is the 80nA). Can someone help me?

To sense low voltage drop across 2 shunt resistors such as 80mV requires 1MOhm shunts to ground. A precision comparator with null adjustment or OpAmp +Sum with 1M impedance to ground with FET input currents of 1pA should work for testing. Then choose gain to suit test. Or one can use a current bridge circuit with a reference in between.

skoda said:

... I need something what can sense current through diode Q3 ( that is the 80nA).

Click to expand...

You could use a current mirror. Connect both currents to the diode-connected transistor and use its gate (= drain) voltage for the current mirror transistor.

thank you guys, for advise.

Erikl you have same idea like me :] but there is a problem that diode connected nmos takes voltage about 0.6V so maybe diode will be close or P_BGR goes to triode.

maybe can I ask for something else?
I make some simple structure that serve like a start-up. I wonder why voltage voffs goes below gnd when Vdd goes down. Voffs is set by P_DIODE MOSFET ( name PMOS_8SERIAL) right ?

skoda said:

I make some simple structure that serve like a start-up. I wonder why voltage voffs goes below gnd when Vdd goes down.

Click to expand...

The start-up circuit isn't shown. I guess its time constant is responsible for this. Try switching on/off with a much larger time constant.

skoda said:

Voffs is set by P_DIODE MOSFET ( name PMOS_8SERIAL) right ?

Click to expand...

Good idea, in principle! But I think vssoff is so low that it allows just deep weak mode operation for the (right) NMOS_2SERIAL transistor. But if <200fA drain current is enough for your application, it's ok.

Another possibility is to use a low threshold or native transistor (Vth≈0), if your PDK library supports such.

Well it should be a start up Let me explain it :]

So Vref and Vrefs are voltage of output branch of bangap reference, so if Opamp work and everything is fine vrefs is about 600mV, which is enough to switch (left) NMOS_2SERIAL. If there is a problem and output voltage of bandgap reference will be lower or zero NMOS_2SERIAL(left) will be cut off.

PMOS_8SERIAL in diode connection should work as a current source and if (left) NMOS_2SERIAL is switch vssoff will be small [ as you can see on posted picture 58mV], if NMOS_2SERIAL is closed it is like a current source with open switch so vssoff will go to vdd, in my case near vdd :]

By this structure I have voltage vssoff which say if bandagap is ON ( vssoff is low) or OFF( vssoff is high). Then I have simply one transistor NMOS_2Serial (right) which serve as a current sink, and this current help to start bangap.

So on schematic you can see situation where Bangap is on and startup is off. In simulation window you can see transient analysis where all circuit is supply by pulse signal (vdd) that is because I test robust of start up and you can see that on second pulse of vdd startup fail and therefore no reference voltage (vref), and startup fail because vssoff had voltage drop under 0V and in next positive pulse is therefore lower then the first one.

Well, sorry for my english and I admit that transistor name is terrible. Anyway thanks to help