Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

CPLD Help needed from a begginer

Status
Not open for further replies.
thebadtall

thebadtall

Full Member level 6
Joined
May 17, 2012
Messages
339
Helped
12
Reputation
24
Reaction score
12
Trophy points
1,308
Location
Hellas
Activity points
3,605
Hello !
Lots of free time, and thought to get involved with CPLD for no reason (just for educational reason)

I have ordered the EPM240 board and blaster programmer.
I have downloaded the quartus web software but it requires x64 while i have x86.

Can you suggest any programming software ?
(and make any suggestions)

Thank you !
 

I would recommend Quartus 13.01.sp1 , as a lot of the older devices has been removed in the 13.1+ versions.

I'm using linux , and my downloaded version runs fine on both x86 and x86_64

Try to get it from here

https://dl.altera.com/13.0sp1/?edition=web

/Bingo

- - - Updated - - -

Btw: I'm a VHDL (CPLD) beginner also

I'm on the last module in this course , it's a nice intro.

http://www.pyroelectro.com/edu/fpga/

/Bingo
 

The last version of Quartus that has 32 bit support is 13.1 - after that it's 64 bit only.

You should also get familiar with working simulation/verification environments - Modelsim for example.
Unlike software/firmware design, most of the FPGA development process is done of board in front of an HDL simulator.

When I'm ready to turn on the synthesis software, that usually means that >99% of the hard work is behind me.
 

shaiko said:
When I'm ready to turn on the synthesis software, that usually means that >99% of the hard work is behind me.
Click to expand...
Unless it's in a very complex system and it's a very large design in a very large FPGA. Just one mistake in interpreting a sentence in the specification on how to handle some special case or a missed corner case in the simulation makes that 1% usually the hardest problem to work out. Even worse is if you tested every branch in every circuit you designed but it doesn't work in the system (because the system doesn't behave anything like your testbench stimulus. :cry:)
 

Unless it's in a very complex system and it's a very large design in a very large FPGA. Just one mistake in interpreting a sentence in the specification on how to handle some special case or a missed corner case in the simulation makes that 1% usually the hardest problem to work out. Even worse is if you tested every branch in every circuit you designed but it doesn't work in the system (because the system doesn't behave anything like your testbench stimulus. )
Click to expand...
Very true...
And for me it only amplifies the need for a more complete and thorough test bench before you reach for your JTAG programmer (and the heavy Tektronix TV very soon after).
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top