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Substrate extraction issue - Cadence gpdk090 technology

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jgmelo

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Hi all,

The problem described in this post is about work in Cadence tools (Virtuoso, Spectre, Assura and QRC).

I am facing a problem when trying to extract the substrate parasitics (substrate only!) with QRC from a layout, the technology being used is Cadence gpdk090. The system is a simple inverter, and I am able to do all the steps up to the av_extract sucessfully (including it - DRC, LVS, QRC extraction), except that the values of the resulting substrate resistor mesh do not make sense, i.e., my extracted inverter with substrate parasitics do not work with such values.

At first, I thought it would be a problem about n-well/p-sub tap placing and quantity. I have tried many tapping configurations, which actually change the values of the resistances. Nevertheless, they still do not make sense.

When I simulate my inverter with the substrate netlist generated by av_extract, I get a signal near to vdd as output, with switching characteristic, but negligible signal excursion, in the order of tens of mV (input: 1.2 V square wave). Something must be wrong with the tool usage, as the inverter layout seems correct (I checked it with more experienced colleagues). My first thought is that some file associated with extraction must be configured with voltages and signals, as QRC cannot calculate resistance values in the substrate without knowing the power and signal values that drive the circuit.

Could someone help me on this issue? If any additional information/file/image/configuration is necessary, please ask me. I prefer not to dump lots of information in this post for the sake of simplicity for the reader. Thanks in advance!

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Versions of products:

virtuoso version 6.1.5
sub-version IC6.1.5.500.11

spectre version 11.1.0 32bit
sub-version 11.1.0.576.isr17

assura version av4.1:production:dfII6.1.5:IC6.1.5.500.17
sub-version 4.1_USR4

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Name : qrc - Cadence Extraction QRC - (32-bit)
Description : Parasitic Extractor
Version : 11.1.2-p106
===========
 

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