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Memory Layout Question

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santhosh.vlsi

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Hi all,

Anyone can please provide me the details about the memory layout engineer responsibilities in the semiconductor companies.
 

... memory layout engineer responsibilities ...

You should
  • understand silicon layout methodology and tools
  • understand the architectures of the memories
  • understand the physical and electrical significance of any layout structure
  • understand all the involved mechanisms of memory data write, conserve and read back, as well as provisions to sustain and read back data correctly (refreshing, rewriting)
  • understand the function of the analog read comparator and its temperature dependent readjustment
  • know your foundry's / fab's technology capabilities
  • understand the backend processes and be capable to cooperate with the backend guys
  • have ideas about using these process capabilities in order to save silicon area resp. improving the yield
  • know and understand your competitors' architectures and layouts
 
Thank You Mr.erikl

As per my knowledge technology node means it depends on the gate length of the transistor.Suppose i want to design a memory block in 22nm node, What points i want to consider.Any text books enriches these aspects with EDA tool examples.


Thank you
 


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