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[SOLVED] ESR meter using 555 timer IC

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pgr2002

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The attached ESR meter with 555 was built by me. This is working fine but only the meter shows FSD when leads are open. If the leads are shorted or a capacitor is connected between the leads then the meter scale moves down to 2v on a 10v scale. Is this behaviour correct. Do we have to read in reverse order since most of the meters move to lower ohms scale when shorted or connected with capacitor but in this case it is reverse. Does anyone know about this circuit which is attached here. Clarification is required by anyone who has come across such type of problems.
 

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Your 555 oscillator is feeding positive and negative AC to the capacitor being tested. Reverse polarity is bad for a polarized capacitor.
The value of the capacitor being tested affects the output. A high value capacitor shorts the output of the 555 which is bad.
 

Basically , yes, the 555 is putting pulses of AC current into the capacitor, if it had a low impedance then it "shorts" out the voltage. If it is high impedance (like when the probes are open circuit), then the voltage exists and is read. As Audio guru says, large electrolytics really should have a DC voltage on them, they have a low capacity with out it. So connect a 10 K resistor between the battery + and the non earthed output terminal. Warning you might find some 6V working capacitors that won't like 9V. So for these, put another 10K across the capacitor under test, this will reduce the 9V to 4.5V.
Frank
 

I think the silly circuit measures the output resistance of the 555 and how long it will last with a shorted output. It also has the ESR of the 22nF 555 output capacitor in series.

The maximum allowed peak output current from a 555 is 200mA then its output has a maximum voltage loss of 2.5V. So its output resistance is 2.5V/200mA= 12.5 ohms which is useless in a capacitor ESR tester.
 

Although I do not think that the circuit is good, it should work. The meter should read full scale with the leads open and zero with the leads shorted or with a good capacitor. The ESR of the 22nF is irrelevant, also the polarity or DC bias is also irrelevant and will have no detrimental effect. It is the reactance of the first 22nF capacitors that give it its ESR range and the current drawn from the 555. My main criticism of the circuit is that the voltage across the capacitor under test is to high for in circuit testing.
 

"Reverse polarity is bad for a polarized capacitor."

Who said the capacitor is seeing a "reverse voltage" across its terminals?
You are trying to imply a situation that DOES NOT EXIST.
 

The current out of the 555 is unipolar, but by the time it goes through the 22NF capacitor it is AC with equal area balancing about the zero volts line. So the capacitor under test has AC fed into it. i.e. its reverse biased every half cycle.
Frank
 

Who said the capacitor is seeing a "reverse voltage" across its terminals?
You are trying to imply a situation that DOES NOT EXIST.
The 555 has a 22nF series output capacitor that has an output to the capacitor under test that swings positive THEN NEGATIVE then positive THEN NEGATIVE again over and over.
So the capacitor under test gets reverse polarity half the time unless its value is MUCH higher than 22nF.

Maybe the 22nF capacitor in series with the output of the 555 should be removed then the capacitor under test gets only positive pulses.
 

The 555 has a 22nF series output capacitor that has an output to the capacitor under test that swings positive THEN NEGATIVE then positive THEN NEGATIVE again over and over.
So the capacitor under test gets reverse polarity half the time unless its value is MUCH higher than 22nF.

Maybe the 22nF capacitor in series with the output of the 555 should be removed then the capacitor under test gets only positive pulses.

To start with, we will be testing capacitors higher than 1u as the project is an ESR tester.
When the circuit is turned ON, both the 22n and capacitor under test are uncharged.
The output of the 555 goes HIGH and both the 22n and electrolytic charge. The 22n will see 90% of the voltage and the electrolytic will see say 10%. And this equates to the energy they will receive.
When the output of the 555 goes LOW, the 22n will simply discharge and the electrolytic will also discharge. No capacitors will have a reverse voltage across them.
 

The output of the 555 goes high and charges the 22nF capacitor. The voltage on the capacitor being tested also gets charged with a little positive voltage.
When the output of the 555 goes low then the output of the 22nF capacitor goes well below ground (a negative voltage swing) which will reverse-bias the capacitor being tested.
 

The output of the 555 goes high and charges the 22nF capacitor. The voltage on the capacitor being tested also gets charged with a little positive voltage.
When the output of the 555 goes low then the output of the 22nF capacitor goes well below ground (a negative voltage swing) which will reverse-bias the capacitor being tested.

That is TOTALLY FALSE.
The energy supplied to the electrolytic during the charging cycle will be removed during the discharge cycle and thus the positive lead of the electrolytic will simply increase to a small voltage and decrease to ZERO.
The problem is you cannot "see" the circuit working and this is one of the main points I have have made during my lecturers in the past 40 years.
If you cannot see a circuit working, you have no possibility of testing, designing and repairing it.
If you cannot SEE the circuit working, simply connect it to a CRO and reduce the timing to a low frequency.
One of the amazing features of a capacitor is this: It will convert a low-current high-voltage into a high-current low-voltage.
That is exactly what is happening here.
I have discussed this amazing feature on my website and it takes a page to discuss.
 

I have discussed this amazing feature on my website and it takes a page to discuss.

Please post a link to your web site.

Edit: I found your web site, but it has a lot of content. Can you post a link to the particular page with the description of the amazing feature you mention?
 
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Did you mean to say that a 10K resistor should be connected from +ve terminal to pin 3 (output terminal) or ......? I did connect a 10k resistor across the capacitor under test but it had no effect on the readings.

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I removed the 22nf from pin 3 of 555. The meter is showing FSD when nothing is connected between the leads and shows readings ranging from <2v to <3v on 10v range and that also caps 1uf above. the 1uf caps shows aroung 6v on 10v range. Is there any chance of further improvement in the circuit.
 

So connect a 10 K resistor between the battery +terminal and the non earthed capacitor test output terminal. Warning you might find some 6V working capacitors that won't like 9V. So for these, put another 10K across the capacitor under test, this will reduce the 9V to 4.5V.

There seems to be a fascination with ESR meters on this board, low value capacitors will have a high impedannce to the frequency used by this ESR meter.
Rather then build an ESR meter, get a 50 MF 450V capacitor, put a piece of red tape around it and solder a red lead on the positive terminal and a black lead on the negative terminal. Repeat for a 2500 MF 50 VW. Solder croc clips to the ends of a 10 MF 63 V tantalum capacitor. If you suspect a capacitor of having a high ESR causing circuit failure, bridge it with one of these, the circuit should spring to life. ESR meters will not find short circuit capacitors which occur as often as high ESR ones. In fact during my career as an electronics maintenance man, I have never changed a cap due to high ESR!.
Frank

Frank
 

Capacitors with high ESR often have very high leakage when their rated voltage is put across them. This is a method that can be used when you do not have access to a ESR meter and the capacitor is out of circuit.
 

I found your web site, but it has a lot of content. Can you post a link to the particular page with the description of the amazing feature you mention?
The moderator keeps deleting my links because they are spam. All my site is SPAM. I don't know why 7,000 visitors a day bother to look at any of the pages.

Here is the action of the capacitor and electro. You need to CLICK to see the animation
Can you see any "negative" voltage entering the electro????
 

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I haven't used a 555 for about 30 years so I simulated the circuit of a 555 with an audio amplifier driving two capacitors in series.

With a 22nF coupling capacitor, a 1uF capacitor being tested and a very high current signal source the capacitor being tested has a signal across it that goes positive then it goes negative then repeats.
But the voltage divider action of the two capacitors reduces the voltage swing of the capacitor being tested to almost nothing.

With a frequency of 4kHz, a 220nF coupling capacitor and a 1uF capacitor being tested you can see the negative voltage swing.
 

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... during my lecturers in the past 40 years.....One of the amazing features of a capacitor is this: It will convert a low-current high-voltage into a high-current low-voltage.

Good one.
:)

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The output of the 555 goes high and charges the 22nF capacitor. The voltage on the capacitor being tested also gets charged with a little positive voltage.
When the output of the 555 goes low then the output of the 22nF capacitor goes well below ground (a negative voltage swing) which will reverse-bias the capacitor being tested.

You are right of course, no need to prove it. The only time it will not hold true is if somehow there is a residual charge on the electrolytic which doesn't dissipate.
 

"With a 22nF coupling capacitor, a 1uF capacitor being tested and a very high current signal source the capacitor being tested has a signal across it that goes positive then it goes negative then repeats."

What actually happens is quite amazing.
The voltage on the join of the two capacitors will be completely different, depending on the value of the capacitor being tested.
When a small value (1u) is being tested, the voltage it sees will rise to a small positive value and then a small negative value.
This is due to the high ESR value (the electrolytic has a resistor connected in series - ESR) and the reverse voltage is developed across this resistor. This is an incorrect assessment of the situation.
When the value of the electro is increased to 100u it does not see any negative voltage.
 
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Whether there is a negative excursion or not, and the magnitude of such excursion (if any) is closely related to the ratio of the capacitor values as well as the ratios of the voltage source impedance w.r.t the ESR

Low Rs/ ESR --> more negative excursion. ESR = 0 there is NO negative excursion.
Low Celectrolytic/ Ccoupling --> more negative excursion

The OP' circuit will give a 1st order reading of the ESR at best
 
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