varun_agr
Newbie level 5
sir
I am tring to trnasmitting data from virtex2pro kit to my laptop with Tri-mode ethernet mac 3.5.i with GMII 10/100 mbps in ISE 10.1.I am using wireshark to capture the frames. But I am facing problem as
1.Is it necessarily to use management configuration for xilinx virtex2pro board LXT972A(U12) IEEE 802.3- complaint Fast ethernet physical layer(PHY). Can we use configuration vector (given in user guide ) in place of management configuration i.e.tieemacconfigvec 67 downto 0.
2. Can we use without clock enable? I am generating txcoreclk i.e. 12.5 Mhz from system clock. But tx_clock i.e. given in virtex2pro ucf is not coming from phy , why it so?
3. As given in transmission section timing diagram clientemactxd is 7 down to 0 and in virtex2pro we r using 4 bit and upper nibble should be zero. Then if my mac id is 25-18-3e-27-14-02 then we should give 00-02-01-04-02-07-03-0e-01-08-02-05 (Left to right )or I am giving address in wrong way.
Sir I tried to transmit data without management configuration with/without clock and without address filter with GMII 100. But I am unable to receive any data in my wireshark. I tried with cross cable and also with hub.
When I do self test of board the ethernet light status are glowing but when I use my programme nothing as in wireshark link disconnected shown.
I also tried with management configuration with hostclk=100Mhz,txgiimgiiclk=25 Mhz(as 100 Mbs),MDC= 2.38Mhz but facing same problem as not getting TX_CLOCK from PHY.
Sir kindly reply me with the solution.
I am tring to trnasmitting data from virtex2pro kit to my laptop with Tri-mode ethernet mac 3.5.i with GMII 10/100 mbps in ISE 10.1.I am using wireshark to capture the frames. But I am facing problem as
1.Is it necessarily to use management configuration for xilinx virtex2pro board LXT972A(U12) IEEE 802.3- complaint Fast ethernet physical layer(PHY). Can we use configuration vector (given in user guide ) in place of management configuration i.e.tieemacconfigvec 67 downto 0.
2. Can we use without clock enable? I am generating txcoreclk i.e. 12.5 Mhz from system clock. But tx_clock i.e. given in virtex2pro ucf is not coming from phy , why it so?
3. As given in transmission section timing diagram clientemactxd is 7 down to 0 and in virtex2pro we r using 4 bit and upper nibble should be zero. Then if my mac id is 25-18-3e-27-14-02 then we should give 00-02-01-04-02-07-03-0e-01-08-02-05 (Left to right )or I am giving address in wrong way.
Sir I tried to transmit data without management configuration with/without clock and without address filter with GMII 100. But I am unable to receive any data in my wireshark. I tried with cross cable and also with hub.
When I do self test of board the ethernet light status are glowing but when I use my programme nothing as in wireshark link disconnected shown.
I also tried with management configuration with hostclk=100Mhz,txgiimgiiclk=25 Mhz(as 100 Mbs),MDC= 2.38Mhz but facing same problem as not getting TX_CLOCK from PHY.
Sir kindly reply me with the solution.
